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| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-09-19 13:20:54 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-09-19 13:20:54 -0400 |
| commit | d7754940d78a7d5bfb13531afa9a67f8c57e987e (patch) | |
| tree | 7a20f7049f7dad5287d623b321539426f39a234b /host/include | |
| parent | 13d6b1608160de40ec65ae4c32419e56714bbadf (diff) | |
| parent | a97a83753c90d79ed15a716610af23fabd84aaed (diff) | |
| download | qemu-d7754940d78a7d5bfb13531afa9a67f8c57e987e.zip qemu-d7754940d78a7d5bfb13531afa9a67f8c57e987e.tar.gz qemu-d7754940d78a7d5bfb13531afa9a67f8c57e987e.tar.bz2 | |
Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into staging
*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads
[Resolved conflict between CPUINFO_PMULL and CPUINFO_BTI.
--Stefan]
* tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits)
tcg: Map code_gen_buffer with PROT_BTI
tcg/aarch64: Emit BTI insns at jump landing pads
util/cpuinfo-aarch64: Add CPUINFO_BTI
tcg: Add tcg_out_tb_start backend hook
fpu: Handle m68k extended precision denormals properly
fpu: Add conversions between bfloat16 and [u]int8
accel/tcg: Introduce do_st16_mmio_leN
accel/tcg: Introduce do_ld16_mmio_beN
accel/tcg: Merge io_writex into do_st_mmio_leN
accel/tcg: Merge io_readx into do_ld_mmio_beN
accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
accel/tcg: Merge cpu_transaction_failed into io_failed
plugin: Simplify struct qemu_plugin_hwaddr
accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
accel/tcg: Split out io_prepare and io_failed
accel/tcg: Simplify tlb_plugin_lookup
target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
tcg: Add gvec compare with immediate and scalar operand
tcg/loongarch64: Implement 128-bit load & store
tcg/loongarch64: Lower rotli_vec to vrotri
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'host/include')
| -rw-r--r-- | host/include/aarch64/host/cpuinfo.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/host/include/aarch64/host/cpuinfo.h b/host/include/aarch64/host/cpuinfo.h index fe8c3b3..fe67153 100644 --- a/host/include/aarch64/host/cpuinfo.h +++ b/host/include/aarch64/host/cpuinfo.h @@ -11,6 +11,7 @@ #define CPUINFO_LSE2 (1u << 2) #define CPUINFO_AES (1u << 3) #define CPUINFO_PMULL (1u << 4) +#define CPUINFO_BTI (1u << 5) /* Initialized with a constructor. */ extern unsigned cpuinfo; |