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2021-05-05Merge remote-tracking branch ↵Peter Maydell371-507/+53
'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' ↵Peter Maydell20-76/+1389
into staging Aspeed patches : * Fixes for the DMA space * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus) * Acceptance tests (Joel) * A fix for the XDMA model * Some extra features for the SMC controller. * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick) # gpg: Signature made Mon 03 May 2021 06:23:36 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20210503: aspeed: Add support for the quanta-q7l1-bmc board hw/block: m25p80: Add support for mt25ql02g and mt25qu02g aspeed: Add support for the rainier-bmc board aspeed: Deprecate the swift-bmc machine tests/qtest: Rename m25p80 test in aspeed_smc test aspeed/smc: Add extra controls to request DMA aspeed/smc: Add a 'features' attribute to the object class hw/misc/aspeed_xdma: Add AST2600 support tests/acceptance: Test ast2600 machine tests/acceptance: Test ast2400 and ast2500 machines tests/qtest: Add test for Aspeed HACE aspeed: Integrate HACE hw: Model ASPEED's Hash and Crypto Engine hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias aspeed/i2c: Rename DMA address space aspeed/i2c: Fix DMA address mask aspeed/smc: Remove unused "sdram-base" property aspeed/smc: Use the RAM memory region for DMAs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-user-20210430' ↵Peter Maydell3-29/+31
into staging bsd-user: start to cleanup the mess A number of small cleanups to get started. All the checkpatch.pl warnings for bsdload.c have been fixed, as well as a warning from qemu.h (though more remain and this patch series fails the format check still). I've also fixed a compile-time warning about a missing break. # gpg: Signature made Fri 30 Apr 2021 16:40:08 BST # gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100 # gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown] # gpg: aka "Warner Losh <imp@bsdimp.com>" [unknown] # gpg: aka "Warner Losh <imp@freebsd.org>" [unknown] # gpg: aka "Warner Losh <imp@village.org>" [unknown] # gpg: aka "Warner Losh <wlosh@bsdimp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100 * remotes/bsdimp/tags/pull-bsd-user-20210430: bsd-user: style tweak: Put {} around all if/else/for statements bsd-user: put back a break; that had gone missing... bsd-user: style tweak: return is not a function, eliminate () bsd-user: style tweak: keyword space ( bsd-user: whitespace changes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-03Merge remote-tracking branch 'remotes/philmd/tags/mips-20210502' into stagingPeter Maydell49-2142/+2410
MIPS patches queue - Fix CACHEE opcode - Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes - Remove isa_get_irq() call in PIIX4 south bridge - Add various missing fields to the MIPS CPU migration vmstate - Lot of code moved around to allow TCG or KVM only builds - Restrict non-virtualized machines to TCG - Add KVM mips64el cross-build jobs to gitlab-ci # gpg: Signature made Sun 02 May 2021 15:56:51 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210502: (36 commits) gitlab-ci: Add KVM mips64el cross-build jobs hw/mips: Restrict non-virtualized machines to TCG target/mips: Move TCG source files under tcg/ sub directory target/mips: Move CP0 helpers to sysemu/cp0.c target/mips: Move exception management code to exception.c target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c target/mips: Move helper_cache() to tcg/sysemu/special_helper.c target/mips: Move Special opcodes to tcg/sysemu/special_helper.c target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope target/mips: Move tlb_helper.c to tcg/sysemu/ target/mips: Restrict mmu_init() to TCG target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG target/mips: Move physical addressing code to sysemu/physaddr.c target/mips: Move sysemu specific files under sysemu/ subfolder target/mips: Move cpu_signal_handler definition around target/mips: Add simple user-mode mips_cpu_tlb_fill() target/mips: Add simple user-mode mips_cpu_do_interrupt() target/mips: Introduce tcg-internal.h for TCG specific declarations meson: Introduce meson_user_arch source set for arch-specific user-mode ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-03hw/rx/rx-gdbsim: Do not accept invalid memory sizePhilippe Mathieu-Daudé1-0/+1
We check the amount of RAM is enough, warn when it is not, but if so we neglect to bail out. Fix that by adding the missing exit() call. Fixes: bda19d7bb56 ("hw/rx: Add RX GDB simulator") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20210407223056.1870497-1-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-03docs: More precisely describe memory-backend-*::id's userRobert Hoo1-3/+3
'id' of memory-backend-{file,ram} is not only for '-numa''s reference, but also other parameters like '-device nvdimm'. More clearly call out this to avoid misinterpretation. Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1619080922-83527-1-git-send-email-robert.hu@linux.intel.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-03scripts: fix generation update-binfmts templatesSilvano Cirujano Cuesta1-1/+3
This patch fixes the update-binfmts templates being used in the script scripts/qemu-binfmt-conf.sh when the option --debian is used. Fixed issues are: - Typo in flag 'credentials' (previously 'credential'). - Missing flags 'preserve' and 'fix_binary'. Reference: https://manpages.debian.org/buster/binfmt-support/update-binfmts.8.en.html#FORMAT_FILES Signed-off-by: Silvano Cirujano Cuesta <silvano.cirujano-cuesta@siemens.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210323123457.23747-1-silvano.cirujano-cuesta@siemens.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-03docs/system: Document the removal of "compat" property for POWER CPUsGreg Kurz1-0/+6
This is just an oversight. Fixes: f518be3aa35b ("target/ppc: Remove "compat" property of server class POWER CPUs") Cc: groug@kaod.org Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <161399328834.51902.14269239378658110394.stgit@bahia.lan> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02mc146818rtc: put it into the 'misc' categoryGan Qixin1-0/+1
The category of the mc146818rtc device is not set, put it into the 'misc' category. Signed-off-by: Gan Qixin <ganqixin@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201130083630.2520597-6-ganqixin@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth125-126/+0
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include cpu.h if it's not really necessaryThomas Huth120-120/+0
Stop including cpu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-4-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include hw/boards.h if it's not really necessaryThomas Huth35-36/+0
Stop including hw/boards.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-3-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth73-74/+0
Stop including sysemu/sysemu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-2-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth51-51/+0
Many files include qemu/log.h without needing it. Remove the superfluous include statements. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210328054833.2351597-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Do not include hw/irq.h if it is not necessaryThomas Huth12-12/+0
Many files include hw/irq.h without needing it. Remove the superfluous include statements. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210327050236.2232347-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Do not include hw/sysbus.h if it is not necessaryThomas Huth27-27/+0
Many files include hw/sysbus.h without needing it. Remove the superfluous include statements. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210327082804.2259480-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw: Remove superfluous includes of hw/hw.hThomas Huth25-25/+0
The include/hw/hw.h header only has a prototype for hw_error(), so it does not make sense to include this in files that do not use this function. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210326151848.2217216-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02ui: Fix memory leak in qemu_xkeymap_mapping_table()Philippe Mathieu-Daudé1-5/+10
Refactor qemu_xkeymap_mapping_table() to have a single exit point, so we can easily free the memory allocated by XGetAtomName(). This fixes when running a binary configured with --enable-sanitizers: Direct leak of 22 byte(s) in 1 object(s) allocated from: #0 0x561344a7473f in malloc (qemu-system-x86_64+0x1dab73f) #1 0x7fa4d9dc08aa in XGetAtomName (/lib64/libX11.so.6+0x2a8aa) Fixes: 2ec78706d18 ("ui: convert GTK and SDL1 frontends to keycodemapdb") Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210430155009.259755-1-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/usb: Constify VMStateDescriptionPhilippe Mathieu-Daudé2-5/+5
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210313171150.2122409-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/display/qxl: Constify VMStateDescriptionPhilippe Mathieu-Daudé1-4/+4
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210313171150.2122409-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/arm: Constify VMStateDescriptionPhilippe Mathieu-Daudé7-10/+10
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210313171150.2122409-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02vmstate: Constify some VMStateDescriptionsKeqian Zhu4-4/+4
Constify vmstate_ecc_state and vmstate_x86_cpu. Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210408140706.23412-1-zhukeqian1@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Fix typo in CFI build documentationSerge Guelton1-2/+2
Signed-off-by: Serge Guelton <sguelton@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210430150745.GA1401713@sguelton.remote.csb> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/pcmcia: Do not register PCMCIA type if not requiredPhilippe Mathieu-Daudé1-1/+1
If the Kconfig 'PCMCIA' value is not selected, it is pointless to build the PCMCIA core components. (Currently only one machine of the ARM targets requires this). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210424222057.3434459-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/ide: Add Kconfig dependency MICRODRIVE -> PCMCIAPhilippe Mathieu-Daudé1-0/+1
The Microdrive Compact Flash can be plugged on a PCMCIA bus. Express the dependency using the 'depends on' Kconfig expression. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210424222057.3434459-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02hw/arm/pxa2xx: Declare PCMCIA bus with KconfigPhilippe Mathieu-Daudé1-0/+1
The Intel XScale PXA chipsets provide a PCMCIA controller, which expose a PCMCIA bus. Express this dependency using the Kconfig 'select' expression. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210424222057.3434459-2-f4bug@amsat.org> [lv: remove "(IDE)"] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02accel: kvm: clarify that extra exit data is hexadecimalDavid Edmondson1-1/+1
When dumping the extra exit data provided by KVM, make it clear that the data is hexadecimal. At the same time, zero-pad the output. Signed-off-by: David Edmondson <david.edmondson@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210428142431.266879-1-david.edmondson@oracle.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' ↵Peter Maydell40-636/+3754
into staging Minor cleanups. Finish the rest of the hexagon integer instructions. # gpg: Signature made Sun 02 May 2021 15:38:17 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-hex-20210502: (31 commits) Hexagon (target/hexagon) CABAC decode bin Hexagon (target/hexagon) load into shifted register instructions Hexagon (target/hexagon) load and unpack bytes instructions Hexagon (target/hexagon) bit reverse (brev) addressing Hexagon (target/hexagon) circular addressing Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Hexagon (target/hexagon) add A6_vminub_RdP Hexagon (target/hexagon) add A5_ACS (vacsh) Hexagon (target/hexagon) add F2_sfinvsqrta Hexagon (target/hexagon) add F2_sfrecipa instruction Hexagon (target/hexagon) compile all debug code Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Hexagon (target/hexagon) cleanup reg_field_info definition Hexagon (target/hexagon) cleanup ternary operators in semantics Hexagon (target/hexagon) use softfloat for float-to-int conversions Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Hexagon (target/hexagon) use softfloat default NaN and tininess Hexagon (target/hexagon) change type of softfloat_roundingmodes Hexagon (target/hexagon) remove unused carry_from_add64 function Hexagon (target/hexagon) change variables from int to bool when appropriate ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-02gitlab-ci: Add KVM mips64el cross-build jobsPhilippe Mathieu-Daudé1-0/+8
Add a new job to cross-build the mips64el target without the TCG accelerator (IOW: only KVM accelerator enabled). Only build the mips64el target which is known to work and has users. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-31-f4bug@amsat.org>
2021-05-02hw/mips: Restrict non-virtualized machines to TCGPhilippe Mathieu-Daudé1-3/+6
Only the malta and loongson3-virt machines support KVM. Restrict the other machines to TCG: - mipssim - magnum - pica61 - fuloong2e - boston Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-30-f4bug@amsat.org>
2021-05-02target/mips: Move TCG source files under tcg/ sub directoryPhilippe Mathieu-Daudé25-43/+41
To ease maintenance, move all TCG specific files under the tcg/ sub-directory. Adapt the Meson machinery. The following prototypes: - mips_tcg_init() - mips_cpu_do_unaligned_access() - mips_cpu_do_transaction_failed() can now be restricted to the "tcg-internal.h" header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
2021-05-02target/mips: Move CP0 helpers to sysemu/cp0.cPhilippe Mathieu-Daudé4-107/+129
Opcodes accessing Coprocessor 0 are privileged. Move the CP0 helpers to sysemu/ and simplify the #ifdef'ry. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-28-f4bug@amsat.org>
2021-05-02target/mips: Move exception management code to exception.cPhilippe Mathieu-Daudé6-163/+182
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-27-f4bug@amsat.org>
2021-05-02target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.cPhilippe Mathieu-Daudé5-350/+340
Move TLB management helpers to tcg/sysemu/tlb_helper.c. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-26-f4bug@amsat.org>
2021-05-02target/mips: Move helper_cache() to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé5-37/+47
Move helper_cache() to tcg/sysemu/special_helper.c. The CACHE opcode is privileged and is not accessible in user emulation. However we get a link failure when restricting the symbol to sysemu. For now, add a stub helper to satisfy linking, which abort if ever called. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-25-f4bug@amsat.org>
2021-05-02target/mips: Move Special opcodes to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé7-122/+151
Move the Special opcodes helpers to tcg/sysemu/special_helper.c. Since mips_io_recompile_replay_branch() is set as CPUClass::io_recompile_replay_branch handler in cpu.c, we need to declare its prototype in "tcg-internal.h". Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-24-f4bug@amsat.org>
2021-05-02target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scopePhilippe Mathieu-Daudé2-12/+7
The 3 map_address() handlers are local to tlb_helper.c, no need to have their prototype declared publically. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-23-f4bug@amsat.org>
2021-05-02target/mips: Move tlb_helper.c to tcg/sysemu/Philippe Mathieu-Daudé5-9/+6
Move tlb_helper.c to the tcg/sysemu/ subdir, along with the following 3 declarations to tcg-internal.h: - cpu_mips_tlb_flush() - cpu_mips_translate_address() - r4k_invalidate_tlb() Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/ are only build when sysemu mode is configured. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-22-f4bug@amsat.org>
2021-05-02target/mips: Restrict mmu_init() to TCGPhilippe Mathieu-Daudé3-4/+3
mmu_init() is only required by TCG accelerator. Restrict its declaration and call to TCG. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-21-f4bug@amsat.org>
2021-05-02target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolderPhilippe Mathieu-Daudé7-167/+179
Move cp0_helper.c and mips-semi.c to the new tcg/sysemu/ folder, adapting the Meson machinery. Move the opcode definitions to tcg/sysemu_helper.h.inc. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-20-f4bug@amsat.org>
2021-05-02target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCGPhilippe Mathieu-Daudé2-4/+9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-19-f4bug@amsat.org>
2021-05-02target/mips: Move physical addressing code to sysemu/physaddr.cPhilippe Mathieu-Daudé4-255/+282
Declare get_physical_address() with local scope and move it along with mips_cpu_get_phys_page_debug() to sysemu/physaddr.c new file. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-18-f4bug@amsat.org>
2021-05-02target/mips: Move sysemu specific files under sysemu/ subfolderPhilippe Mathieu-Daudé6-7/+13
Move sysemu-specific files under the new sysemu/ subfolder and adapt the Meson machinery. Update the KVM MIPS entry in MAINTAINERS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-17-f4bug@amsat.org>
2021-05-02target/mips: Move cpu_signal_handler definition aroundPhilippe Mathieu-Daudé1-5/+4
We have 2 blocks guarded with #ifdef for sysemu, which are simply separated by the cpu_signal_handler definition. To simplify the following commits which involve various changes in internal.h, first join the sysemu-guarded blocks. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-16-f4bug@amsat.org>
2021-05-02target/mips: Add simple user-mode mips_cpu_tlb_fill()Philippe Mathieu-Daudé2-10/+36
tlb_helper.c's #ifdef'ry hides a quite simple user-mode implementation of mips_cpu_tlb_fill(). Copy the user-mode implementation (without #ifdef'ry) to tcg/user/helper.c and simplify tlb_helper.c's #ifdef'ry. This will allow us to restrict tlb_helper.c to sysemu. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-15-f4bug@amsat.org>
2021-05-02target/mips: Add simple user-mode mips_cpu_do_interrupt()Philippe Mathieu-Daudé5-5/+39
The #ifdef'ry hides that the user-mode implementation of mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE. Add this simple implementation to tcg/user/tlb_helper.c, and the corresponding Meson machinery to build this file when user emulation is configured. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
2021-05-02target/mips: Introduce tcg-internal.h for TCG specific declarationsPhilippe Mathieu-Daudé2-4/+23
We will gradually move TCG-specific declarations to a new local header: "tcg-internal.h". To keep review simple, first add this header with 2 TCG prototypes, which we are going to move in the next 2 commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-13-f4bug@amsat.org>
2021-05-02meson: Introduce meson_user_arch source set for arch-specific user-modePhilippe Mathieu-Daudé1-0/+6
Similarly to the 'target_softmmu_arch' source set which allows to restrict target-specific sources to system emulation, add the equivalent 'target_user_arch' set for user emulation. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-12-f4bug@amsat.org>
2021-05-02target/mips: Extract load/store helpers to ldst_helper.cPhilippe Mathieu-Daudé3-259/+289
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-11-f4bug@amsat.org>
2021-05-02target/mips: Merge do_translate_address into cpu_mips_translate_addressPhilippe Mathieu-Daudé3-24/+9
Currently cpu_mips_translate_address() calls raise_mmu_exception(), and do_translate_address() calls cpu_loop_exit_restore(). This API split is dangerous, we could call cpu_mips_translate_address without returning to the main loop. As there is only one caller, it is trivial (and safer) to merge do_translate_address() back to cpu_mips_translate_address(). Reported-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-10-f4bug@amsat.org>
generated by cgit v1.1 at 2024-10-28 21:31:49 +0000