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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-04-19 18:00:55 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-02 16:49:34 +0200 |
| commit | 0debf1400c000154948e8a6fcb89c3149d4e0880 (patch) | |
| tree | 9494e85cc911d294917767c6cd7d971937aca724 | |
| parent | 533fc64feb96b6aafdb0d604cd1cd97877451878 (diff) | |
| download | qemu-0debf1400c000154948e8a6fcb89c3149d4e0880.zip qemu-0debf1400c000154948e8a6fcb89c3149d4e0880.tar.gz qemu-0debf1400c000154948e8a6fcb89c3149d4e0880.tar.bz2 | |
target/mips: Merge do_translate_address into cpu_mips_translate_address
Currently cpu_mips_translate_address() calls raise_mmu_exception(),
and do_translate_address() calls cpu_loop_exit_restore().
This API split is dangerous, we could call cpu_mips_translate_address
without returning to the main loop.
As there is only one caller, it is trivial (and safer) to merge
do_translate_address() back to cpu_mips_translate_address().
Reported-by: Richard Henderson <richard.henderson@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-10-f4bug@amsat.org>
| -rw-r--r-- | target/mips/internal.h | 2 | ||||
| -rw-r--r-- | target/mips/op_helper.c | 20 | ||||
| -rw-r--r-- | target/mips/tlb_helper.c | 11 |
3 files changed, 9 insertions, 24 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 04f4b3d..e93e057 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -148,7 +148,7 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr); hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address, - MMUAccessType access_type); + MMUAccessType access_type, uintptr_t retaddr); #endif #define cpu_signal_handler cpu_mips_signal_handler diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 222a0d7..61e68cc 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -287,23 +287,6 @@ target_ulong helper_rotx(target_ulong rs, uint32_t shift, uint32_t shiftx, #ifndef CONFIG_USER_ONLY -static inline hwaddr do_translate_address(CPUMIPSState *env, - target_ulong address, - MMUAccessType access_type, - uintptr_t retaddr) -{ - hwaddr paddr; - CPUState *cs = env_cpu(env); - - paddr = cpu_mips_translate_address(env, address, access_type); - - if (paddr == -1LL) { - cpu_loop_exit_restore(cs, retaddr); - } else { - return paddr; - } -} - #define HELPER_LD_ATOMIC(name, insn, almask, do_cast) \ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \ { \ @@ -313,7 +296,8 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \ } \ do_raise_exception(env, EXCP_AdEL, GETPC()); \ } \ - env->CP0_LLAddr = do_translate_address(env, arg, MMU_DATA_LOAD, GETPC()); \ + env->CP0_LLAddr = cpu_mips_translate_address(env, arg, MMU_DATA_LOAD, \ + GETPC()); \ env->lladdr = arg; \ env->llval = do_cast cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \ return env->llval; \ diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c index 8d3ea49..1ffdc1f 100644 --- a/target/mips/tlb_helper.c +++ b/target/mips/tlb_helper.c @@ -904,21 +904,22 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, #ifndef CONFIG_USER_ONLY hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address, - MMUAccessType access_type) + MMUAccessType access_type, uintptr_t retaddr) { hwaddr physical; int prot; int ret = 0; + CPUState *cs = env_cpu(env); /* data access */ ret = get_physical_address(env, &physical, &prot, address, access_type, cpu_mmu_index(env, false)); - if (ret != TLBRET_MATCH) { - raise_mmu_exception(env, address, access_type, ret); - return -1LL; - } else { + if (ret == TLBRET_MATCH) { return physical; } + + raise_mmu_exception(env, address, access_type, ret); + cpu_loop_exit_restore(cs, retaddr); } static void set_hflags_for_handler(CPUMIPSState *env) |