diff options
Diffstat (limited to 'target')
-rw-r--r-- | target/mips/cpu.c | 2 | ||||
-rw-r--r-- | target/mips/cpu.h | 8 | ||||
-rw-r--r-- | target/mips/translate.c | 20 | ||||
-rw-r--r-- | target/mips/translate_init.c | 12 |
4 files changed, 13 insertions, 29 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 80812f3..069f935 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -154,7 +154,7 @@ static void mips_cpu_initfn(Object *obj) static char *mips_cpu_type_name(const char *cpu_model) { - return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model); + return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model); } static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 66265e4..7f8ba5f 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -740,8 +740,12 @@ enum { int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model) -bool cpu_supports_cps_smp(const char *cpu_model); -bool cpu_supports_isa(const char *cpu_model, unsigned int isa); + +#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU +#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX + +bool cpu_supports_cps_smp(const char *cpu_type); +bool cpu_supports_isa(const char *cpu_type, unsigned int isa); void cpu_set_exception_base(int vp_index, target_ulong address); /* mips_int.c */ diff --git a/target/mips/translate.c b/target/mips/translate.c index 82622c5..1848500 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20512,24 +20512,16 @@ void cpu_mips_realize_env(CPUMIPSState *env) mvp_init(env, env->cpu_model); } -bool cpu_supports_cps_smp(const char *cpu_model) +bool cpu_supports_cps_smp(const char *cpu_type) { - const mips_def_t *def = cpu_mips_find_by_name(cpu_model); - if (!def) { - return false; - } - - return (def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; + const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); + return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(const char *cpu_model, unsigned int isa) +bool cpu_supports_isa(const char *cpu_type, unsigned int isa) { - const mips_def_t *def = cpu_mips_find_by_name(cpu_model); - if (!def) { - return false; - } - - return (def->insn_flags & isa) != 0; + const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); + return (mcc->cpu_def->insn_flags & isa) != 0; } void cpu_set_exception_base(int vp_index, target_ulong address) diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c index 8bbded4..c7ba6ee 100644 --- a/target/mips/translate_init.c +++ b/target/mips/translate_init.c @@ -755,18 +755,6 @@ const mips_def_t mips_defs[] = }; const int mips_defs_number = ARRAY_SIZE(mips_defs); -static const mips_def_t *cpu_mips_find_by_name (const char *name) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(mips_defs); i++) { - if (strcasecmp(name, mips_defs[i].name) == 0) { - return &mips_defs[i]; - } - } - return NULL; -} - void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf) { int i; |