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-rw-r--r--target/meson.build1
-rw-r--r--target/moxie/cpu-param.h17
-rw-r--r--target/moxie/cpu.c161
-rw-r--r--target/moxie/cpu.h123
-rw-r--r--target/moxie/helper.c120
-rw-r--r--target/moxie/helper.h5
-rw-r--r--target/moxie/machine.c19
-rw-r--r--target/moxie/machine.h1
-rw-r--r--target/moxie/meson.build14
-rw-r--r--target/moxie/mmu.c32
-rw-r--r--target/moxie/mmu.h19
-rw-r--r--target/moxie/translate.c892
12 files changed, 0 insertions, 1404 deletions
diff --git a/target/meson.build b/target/meson.build
index 0e2c4b6..289a654 100644
--- a/target/meson.build
+++ b/target/meson.build
@@ -9,7 +9,6 @@ subdir('lm32')
subdir('m68k')
subdir('microblaze')
subdir('mips')
-subdir('moxie')
subdir('nios2')
subdir('openrisc')
subdir('ppc')
diff --git a/target/moxie/cpu-param.h b/target/moxie/cpu-param.h
deleted file mode 100644
index 9a40ef5..0000000
--- a/target/moxie/cpu-param.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Moxie cpu parameters for qemu.
- *
- * Copyright (c) 2008, 2010, 2013 Anthony Green
- * SPDX-License-Identifier: LGPL-2.1+
- */
-
-#ifndef MOXIE_CPU_PARAM_H
-#define MOXIE_CPU_PARAM_H 1
-
-#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12 /* 4k */
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define NB_MMU_MODES 1
-
-#endif
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
deleted file mode 100644
index 83bec34d..0000000
--- a/target/moxie/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * QEMU Moxie CPU
- *
- * Copyright (c) 2013 Anthony Green
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "qemu/osdep.h"
-#include "qapi/error.h"
-#include "cpu.h"
-#include "migration/vmstate.h"
-#include "machine.h"
-
-static void moxie_cpu_set_pc(CPUState *cs, vaddr value)
-{
- MoxieCPU *cpu = MOXIE_CPU(cs);
-
- cpu->env.pc = value;
-}
-
-static bool moxie_cpu_has_work(CPUState *cs)
-{
- return cs->interrupt_request & CPU_INTERRUPT_HARD;
-}
-
-static void moxie_cpu_reset(DeviceState *dev)
-{
- CPUState *s = CPU(dev);
- MoxieCPU *cpu = MOXIE_CPU(s);
- MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
- CPUMoxieState *env = &cpu->env;
-
- mcc->parent_reset(dev);
-
- memset(env, 0, offsetof(CPUMoxieState, end_reset_fields));
- env->pc = 0x1000;
-}
-
-static void moxie_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
-{
- info->mach = bfd_arch_moxie;
- info->print_insn = print_insn_moxie;
-}
-
-static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
-{
- CPUState *cs = CPU(dev);
- MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev);
- Error *local_err = NULL;
-
- cpu_exec_realizefn(cs, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
-
- qemu_init_vcpu(cs);
- cpu_reset(cs);
-
- mcc->parent_realize(dev, errp);
-}
-
-static void moxie_cpu_initfn(Object *obj)
-{
- MoxieCPU *cpu = MOXIE_CPU(obj);
-
- cpu_set_cpustate_pointers(cpu);
-}
-
-static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
-#include "hw/core/tcg-cpu-ops.h"
-
-static struct TCGCPUOps moxie_tcg_ops = {
- .initialize = moxie_translate_init,
- .tlb_fill = moxie_cpu_tlb_fill,
-
-#ifndef CONFIG_USER_ONLY
- .do_interrupt = moxie_cpu_do_interrupt,
-#endif /* !CONFIG_USER_ONLY */
-};
-
-static void moxie_cpu_class_init(ObjectClass *oc, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(oc);
- CPUClass *cc = CPU_CLASS(oc);
- MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
-
- device_class_set_parent_realize(dc, moxie_cpu_realizefn,
- &mcc->parent_realize);
- device_class_set_parent_reset(dc, moxie_cpu_reset, &mcc->parent_reset);
-
- cc->class_by_name = moxie_cpu_class_by_name;
-
- cc->has_work = moxie_cpu_has_work;
- cc->dump_state = moxie_cpu_dump_state;
- cc->set_pc = moxie_cpu_set_pc;
-#ifndef CONFIG_USER_ONLY
- cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_moxie_cpu;
-#endif
- cc->disas_set_info = moxie_cpu_disas_set_info;
- cc->tcg_ops = &moxie_tcg_ops;
-}
-
-static void moxielite_initfn(Object *obj)
-{
- /* Set cpu feature flags */
-}
-
-static void moxie_any_initfn(Object *obj)
-{
- /* Set cpu feature flags */
-}
-
-#define DEFINE_MOXIE_CPU_TYPE(cpu_model, initfn) \
- { \
- .parent = TYPE_MOXIE_CPU, \
- .instance_init = initfn, \
- .name = MOXIE_CPU_TYPE_NAME(cpu_model), \
- }
-
-static const TypeInfo moxie_cpus_type_infos[] = {
- { /* base class should be registered first */
- .name = TYPE_MOXIE_CPU,
- .parent = TYPE_CPU,
- .instance_size = sizeof(MoxieCPU),
- .instance_init = moxie_cpu_initfn,
- .class_size = sizeof(MoxieCPUClass),
- .class_init = moxie_cpu_class_init,
- },
- DEFINE_MOXIE_CPU_TYPE("MoxieLite", moxielite_initfn),
- DEFINE_MOXIE_CPU_TYPE("any", moxie_any_initfn),
-};
-
-DEFINE_TYPES(moxie_cpus_type_infos)
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
deleted file mode 100644
index bd6ab66..0000000
--- a/target/moxie/cpu.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * Moxie emulation
- *
- * Copyright (c) 2008, 2010, 2013 Anthony Green
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef MOXIE_CPU_H
-#define MOXIE_CPU_H
-
-#include "exec/cpu-defs.h"
-#include "qom/object.h"
-
-#define MOXIE_EX_DIV0 0
-#define MOXIE_EX_BAD 1
-#define MOXIE_EX_IRQ 2
-#define MOXIE_EX_SWI 3
-#define MOXIE_EX_MMU_MISS 4
-#define MOXIE_EX_BREAK 16
-
-typedef struct CPUMoxieState {
-
- uint32_t flags; /* general execution flags */
- uint32_t gregs[16]; /* general registers */
- uint32_t sregs[256]; /* special registers */
- uint32_t pc; /* program counter */
- /* Instead of saving the cc value, we save the cmp arguments
- and compute cc on demand. */
- uint32_t cc_a; /* reg a for condition code calculation */
- uint32_t cc_b; /* reg b for condition code calculation */
-
- void *irq[8];
-
- /* Fields up to this point are cleared by a CPU reset */
- struct {} end_reset_fields;
-} CPUMoxieState;
-
-#include "hw/core/cpu.h"
-
-#define TYPE_MOXIE_CPU "moxie-cpu"
-
-OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass,
- MOXIE_CPU)
-
-/**
- * MoxieCPUClass:
- * @parent_reset: The parent class' reset handler.
- *
- * A Moxie CPU model.
- */
-struct MoxieCPUClass {
- /*< private >*/
- CPUClass parent_class;
- /*< public >*/
-
- DeviceRealize parent_realize;
- DeviceReset parent_reset;
-};
-
-/**
- * MoxieCPU:
- * @env: #CPUMoxieState
- *
- * A Moxie CPU.
- */
-struct MoxieCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUNegativeOffsetState neg;
- CPUMoxieState env;
-};
-
-
-void moxie_cpu_do_interrupt(CPUState *cs);
-void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-void moxie_translate_init(void);
-int cpu_moxie_signal_handler(int host_signum, void *pinfo,
- void *puc);
-
-#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
-#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
-#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
-
-#define cpu_signal_handler cpu_moxie_signal_handler
-
-static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
-{
- return 0;
-}
-
-typedef CPUMoxieState CPUArchState;
-typedef MoxieCPU ArchCPU;
-
-#include "exec/cpu-all.h"
-
-static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
- target_ulong *cs_base, uint32_t *flags)
-{
- *pc = env->pc;
- *cs_base = 0;
- *flags = 0;
-}
-
-bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
-
-#endif /* MOXIE_CPU_H */
diff --git a/target/moxie/helper.c b/target/moxie/helper.c
deleted file mode 100644
index b1919f6..0000000
--- a/target/moxie/helper.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Moxie helper routines.
- *
- * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "qemu/osdep.h"
-
-#include "cpu.h"
-#include "mmu.h"
-#include "exec/exec-all.h"
-#include "exec/cpu_ldst.h"
-#include "qemu/host-utils.h"
-#include "exec/helper-proto.h"
-
-void helper_raise_exception(CPUMoxieState *env, int ex)
-{
- CPUState *cs = env_cpu(env);
-
- cs->exception_index = ex;
- /* Stash the exception type. */
- env->sregs[2] = ex;
- /* Stash the address where the exception occurred. */
- cpu_restore_state(cs, GETPC(), true);
- env->sregs[5] = env->pc;
- /* Jump to the exception handline routine. */
- env->pc = env->sregs[1];
- cpu_loop_exit(cs);
-}
-
-uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
-{
- if (unlikely(b == 0)) {
- helper_raise_exception(env, MOXIE_EX_DIV0);
- return 0;
- }
- if (unlikely(a == INT_MIN && b == -1)) {
- return INT_MIN;
- }
-
- return (int32_t)a / (int32_t)b;
-}
-
-uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
-{
- if (unlikely(b == 0)) {
- helper_raise_exception(env, MOXIE_EX_DIV0);
- return 0;
- }
- return a / b;
-}
-
-void helper_debug(CPUMoxieState *env)
-{
- CPUState *cs = env_cpu(env);
-
- cs->exception_index = EXCP_DEBUG;
- cpu_loop_exit(cs);
-}
-
-bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- MoxieCPU *cpu = MOXIE_CPU(cs);
- CPUMoxieState *env = &cpu->env;
- MoxieMMUResult res;
- int prot, miss;
-
- address &= TARGET_PAGE_MASK;
- prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
- miss = moxie_mmu_translate(&res, env, address, access_type, mmu_idx);
- if (likely(!miss)) {
- tlb_set_page(cs, address, res.phy, prot, mmu_idx, TARGET_PAGE_SIZE);
- return true;
- }
- if (probe) {
- return false;
- }
-
- cs->exception_index = MOXIE_EX_MMU_MISS;
- cpu_loop_exit_restore(cs, retaddr);
-}
-
-void moxie_cpu_do_interrupt(CPUState *cs)
-{
- switch (cs->exception_index) {
- case MOXIE_EX_BREAK:
- break;
- default:
- break;
- }
-}
-
-hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
-{
- MoxieCPU *cpu = MOXIE_CPU(cs);
- uint32_t phy = addr;
- MoxieMMUResult res;
- int miss;
-
- miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
- if (!miss) {
- phy = res.phy;
- }
- return phy;
-}
diff --git a/target/moxie/helper.h b/target/moxie/helper.h
deleted file mode 100644
index d94ef7a..0000000
--- a/target/moxie/helper.h
+++ /dev/null
@@ -1,5 +0,0 @@
-DEF_HELPER_2(raise_exception, void, env, int)
-DEF_HELPER_1(debug, void, env)
-
-DEF_HELPER_FLAGS_3(div, TCG_CALL_NO_WG, i32, env, i32, i32)
-DEF_HELPER_FLAGS_3(udiv, TCG_CALL_NO_WG, i32, env, i32, i32)
diff --git a/target/moxie/machine.c b/target/moxie/machine.c
deleted file mode 100644
index d0f1770..0000000
--- a/target/moxie/machine.c
+++ /dev/null
@@ -1,19 +0,0 @@
-#include "qemu/osdep.h"
-#include "cpu.h"
-#include "machine.h"
-#include "migration/cpu.h"
-
-const VMStateDescription vmstate_moxie_cpu = {
- .name = "cpu",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINT32(flags, CPUMoxieState),
- VMSTATE_UINT32_ARRAY(gregs, CPUMoxieState, 16),
- VMSTATE_UINT32_ARRAY(sregs, CPUMoxieState, 256),
- VMSTATE_UINT32(pc, CPUMoxieState),
- VMSTATE_UINT32(cc_a, CPUMoxieState),
- VMSTATE_UINT32(cc_b, CPUMoxieState),
- VMSTATE_END_OF_LIST()
- }
-};
diff --git a/target/moxie/machine.h b/target/moxie/machine.h
deleted file mode 100644
index a1b7290..0000000
--- a/target/moxie/machine.h
+++ /dev/null
@@ -1 +0,0 @@
-extern const VMStateDescription vmstate_moxie_cpu;
diff --git a/target/moxie/meson.build b/target/moxie/meson.build
deleted file mode 100644
index b4beb52..0000000
--- a/target/moxie/meson.build
+++ /dev/null
@@ -1,14 +0,0 @@
-moxie_ss = ss.source_set()
-moxie_ss.add(files(
- 'cpu.c',
- 'helper.c',
- 'machine.c',
- 'machine.c',
- 'translate.c',
-))
-
-moxie_softmmu_ss = ss.source_set()
-moxie_softmmu_ss.add(files('mmu.c'))
-
-target_arch += {'moxie': moxie_ss}
-target_softmmu_arch += {'moxie': moxie_softmmu_ss}
diff --git a/target/moxie/mmu.c b/target/moxie/mmu.c
deleted file mode 100644
index 87783a3..0000000
--- a/target/moxie/mmu.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Moxie mmu emulation.
- *
- * Copyright (c) 2008, 2013 Anthony Green
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "qemu/osdep.h"
-
-#include "cpu.h"
-#include "mmu.h"
-
-int moxie_mmu_translate(MoxieMMUResult *res,
- CPUMoxieState *env, uint32_t vaddr,
- int rw, int mmu_idx)
-{
- /* Perform no translation yet. */
- res->phy = vaddr;
- return 0;
-}
diff --git a/target/moxie/mmu.h b/target/moxie/mmu.h
deleted file mode 100644
index d80690f..0000000
--- a/target/moxie/mmu.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#ifndef TARGET_MOXIE_MMU_H
-#define TARGET_MOXIE_MMU_H
-
-#define MOXIE_MMU_ERR_EXEC 0
-#define MOXIE_MMU_ERR_READ 1
-#define MOXIE_MMU_ERR_WRITE 2
-#define MOXIE_MMU_ERR_FLUSH 3
-
-typedef struct {
- uint32_t phy;
- uint32_t pfn;
- int cause_op;
-} MoxieMMUResult;
-
-int moxie_mmu_translate(MoxieMMUResult *res,
- CPUMoxieState *env, uint32_t vaddr,
- int rw, int mmu_idx);
-
-#endif
diff --git a/target/moxie/translate.c b/target/moxie/translate.c
deleted file mode 100644
index 24a742b..0000000
--- a/target/moxie/translate.c
+++ /dev/null
@@ -1,892 +0,0 @@
-/*
- * Moxie emulation for qemu: main translation routines.
- *
- * Copyright (c) 2009, 2013 Anthony Green
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public License
- * as published by the Free Software Foundation; either version 2.1 of
- * the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* For information on the Moxie architecture, see
- * http://moxielogic.org/wiki
- */
-
-#include "qemu/osdep.h"
-
-#include "cpu.h"
-#include "exec/exec-all.h"
-#include "disas/disas.h"
-#include "tcg/tcg-op.h"
-#include "exec/cpu_ldst.h"
-#include "qemu/qemu-print.h"
-
-#include "exec/helper-proto.h"
-#include "exec/helper-gen.h"
-#include "exec/log.h"
-
-/* This is the state at translation time. */
-typedef struct DisasContext {
- TranslationBlock *tb;
- target_ulong pc, saved_pc;
- uint32_t opcode;
- uint32_t fp_status;
- /* Routine used to access memory */
- int memidx;
- int bstate;
- target_ulong btarget;
- int singlestep_enabled;
-} DisasContext;
-
-enum {
- BS_NONE = 0, /* We go out of the TB without reaching a branch or an
- * exception condition */
- BS_STOP = 1, /* We want to stop translation for any reason */
- BS_BRANCH = 2, /* We reached a branch condition */
- BS_EXCP = 3, /* We reached an exception condition */
-};
-
-static TCGv cpu_pc;
-static TCGv cpu_gregs[16];
-static TCGv cc_a, cc_b;
-
-#include "exec/gen-icount.h"
-
-#define REG(x) (cpu_gregs[x])
-
-/* Extract the signed 10-bit offset from a 16-bit branch
- instruction. */
-static int extract_branch_offset(int opcode)
-{
- return (((signed short)((opcode & ((1 << 10) - 1)) << 6)) >> 6) << 1;
-}
-
-void moxie_cpu_dump_state(CPUState *cs, FILE *f, int flags)
-{
- MoxieCPU *cpu = MOXIE_CPU(cs);
- CPUMoxieState *env = &cpu->env;
- int i;
- qemu_fprintf(f, "pc=0x%08x\n", env->pc);
- qemu_fprintf(f, "$fp=0x%08x $sp=0x%08x $r0=0x%08x $r1=0x%08x\n",
- env->gregs[0], env->gregs[1], env->gregs[2], env->gregs[3]);
- for (i = 4; i < 16; i += 4) {
- qemu_fprintf(f, "$r%d=0x%08x $r%d=0x%08x $r%d=0x%08x $r%d=0x%08x\n",
- i - 2, env->gregs[i], i - 1, env->gregs[i + 1],
- i, env->gregs[i + 2], i + 1, env->gregs[i + 3]);
- }
- for (i = 4; i < 16; i += 4) {
- qemu_fprintf(f, "sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x\n",
- i - 2, env->sregs[i], i - 1, env->sregs[i + 1],
- i, env->sregs[i + 2], i + 1, env->sregs[i + 3]);
- }
-}
-
-void moxie_translate_init(void)
-{
- int i;
- static const char * const gregnames[16] = {
- "$fp", "$sp", "$r0", "$r1",
- "$r2", "$r3", "$r4", "$r5",
- "$r6", "$r7", "$r8", "$r9",
- "$r10", "$r11", "$r12", "$r13"
- };
-
- cpu_pc = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMoxieState, pc), "$pc");
- for (i = 0; i < 16; i++)
- cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMoxieState, gregs[i]),
- gregnames[i]);
-
- cc_a = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMoxieState, cc_a), "cc_a");
- cc_b = tcg_global_mem_new_i32(cpu_env,
- offsetof(CPUMoxieState, cc_b), "cc_b");
-}
-
-static inline bool use_goto_tb(DisasContext *ctx, target_ulong dest)
-{
- if (unlikely(ctx->singlestep_enabled)) {
- return false;
- }
-
-#ifndef CONFIG_USER_ONLY
- return (ctx->tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK);
-#else
- return true;
-#endif
-}
-
-static inline void gen_goto_tb(CPUMoxieState *env, DisasContext *ctx,
- int n, target_ulong dest)
-{
- if (use_goto_tb(ctx, dest)) {
- tcg_gen_goto_tb(n);
- tcg_gen_movi_i32(cpu_pc, dest);
- tcg_gen_exit_tb(ctx->tb, n);
- } else {
- tcg_gen_movi_i32(cpu_pc, dest);
- if (ctx->singlestep_enabled) {
- gen_helper_debug(cpu_env);
- }
- tcg_gen_exit_tb(NULL, 0);
- }
-}
-
-static int decode_opc(MoxieCPU *cpu, DisasContext *ctx)
-{
- CPUMoxieState *env = &cpu->env;
-
- /* Local cache for the instruction opcode. */
- int opcode;
- /* Set the default instruction length. */
- int length = 2;
-
- /* Examine the 16-bit opcode. */
- opcode = ctx->opcode;
-
- /* Decode instruction. */
- if (opcode & (1 << 15)) {
- if (opcode & (1 << 14)) {
- /* This is a Form 3 instruction. */
- int inst = (opcode >> 10 & 0xf);
-
-#define BRANCH(cond) \
- do { \
- TCGLabel *l1 = gen_new_label(); \
- tcg_gen_brcond_i32(cond, cc_a, cc_b, l1); \
- gen_goto_tb(env, ctx, 1, ctx->pc+2); \
- gen_set_label(l1); \
- gen_goto_tb(env, ctx, 0, extract_branch_offset(opcode) + ctx->pc+2); \
- ctx->bstate = BS_BRANCH; \
- } while (0)
-
- switch (inst) {
- case 0x00: /* beq */
- BRANCH(TCG_COND_EQ);
- break;
- case 0x01: /* bne */
- BRANCH(TCG_COND_NE);
- break;
- case 0x02: /* blt */
- BRANCH(TCG_COND_LT);
- break;
- case 0x03: /* bgt */
- BRANCH(TCG_COND_GT);
- break;
- case 0x04: /* bltu */
- BRANCH(TCG_COND_LTU);
- break;
- case 0x05: /* bgtu */
- BRANCH(TCG_COND_GTU);
- break;
- case 0x06: /* bge */
- BRANCH(TCG_COND_GE);
- break;
- case 0x07: /* ble */
- BRANCH(TCG_COND_LE);
- break;
- case 0x08: /* bgeu */
- BRANCH(TCG_COND_GEU);
- break;
- case 0x09: /* bleu */
- BRANCH(TCG_COND_LEU);
- break;
- default:
- {
- TCGv temp = tcg_temp_new_i32();
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- tcg_gen_movi_i32(temp, MOXIE_EX_BAD);
- gen_helper_raise_exception(cpu_env, temp);
- tcg_temp_free_i32(temp);
- }
- break;
- }
- } else {
- /* This is a Form 2 instruction. */
- int inst = (opcode >> 12 & 0x3);
- switch (inst) {
- case 0x00: /* inc */
- {
- int a = (opcode >> 8) & 0xf;
- unsigned int v = (opcode & 0xff);
- tcg_gen_addi_i32(REG(a), REG(a), v);
- }
- break;
- case 0x01: /* dec */
- {
- int a = (opcode >> 8) & 0xf;
- unsigned int v = (opcode & 0xff);
- tcg_gen_subi_i32(REG(a), REG(a), v);
- }
- break;
- case 0x02: /* gsr */
- {
- int a = (opcode >> 8) & 0xf;
- unsigned v = (opcode & 0xff);
- tcg_gen_ld_i32(REG(a), cpu_env,
- offsetof(CPUMoxieState, sregs[v]));
- }
- break;
- case 0x03: /* ssr */
- {
- int a = (opcode >> 8) & 0xf;
- unsigned v = (opcode & 0xff);
- tcg_gen_st_i32(REG(a), cpu_env,
- offsetof(CPUMoxieState, sregs[v]));
- }
- break;
- default:
- {
- TCGv temp = tcg_temp_new_i32();
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- tcg_gen_movi_i32(temp, MOXIE_EX_BAD);
- gen_helper_raise_exception(cpu_env, temp);
- tcg_temp_free_i32(temp);
- }
- break;
- }
- }
- } else {
- /* This is a Form 1 instruction. */
- int inst = opcode >> 8;
- switch (inst) {
- case 0x00: /* nop */
- break;
- case 0x01: /* ldi.l (immediate) */
- {
- int reg = (opcode >> 4) & 0xf;
- int val = cpu_ldl_code(env, ctx->pc+2);
- tcg_gen_movi_i32(REG(reg), val);
- length = 6;
- }
- break;
- case 0x02: /* mov (register-to-register) */
- {
- int dest = (opcode >> 4) & 0xf;
- int src = opcode & 0xf;
- tcg_gen_mov_i32(REG(dest), REG(src));
- }
- break;
- case 0x03: /* jsra */
- {
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
-
- tcg_gen_movi_i32(t1, ctx->pc + 6);
-
- /* Make space for the static chain and return address. */
- tcg_gen_subi_i32(t2, REG(1), 8);
- tcg_gen_mov_i32(REG(1), t2);
- tcg_gen_qemu_st32(t1, REG(1), ctx->memidx);
-
- /* Push the current frame pointer. */
- tcg_gen_subi_i32(t2, REG(1), 4);
- tcg_gen_mov_i32(REG(1), t2);
- tcg_gen_qemu_st32(REG(0), REG(1), ctx->memidx);
-
- /* Set the pc and $fp. */
- tcg_gen_mov_i32(REG(0), REG(1));
-
- gen_goto_tb(env, ctx, 0, cpu_ldl_code(env, ctx->pc+2));
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- ctx->bstate = BS_BRANCH;
- length = 6;
- }
- break;
- case 0x04: /* ret */
- {
- TCGv t1 = tcg_temp_new_i32();
-
- /* The new $sp is the old $fp. */
- tcg_gen_mov_i32(REG(1), REG(0));
-
- /* Pop the frame pointer. */
- tcg_gen_qemu_ld32u(REG(0), REG(1), ctx->memidx);
- tcg_gen_addi_i32(t1, REG(1), 4);
- tcg_gen_mov_i32(REG(1), t1);
-
-
- /* Pop the return address and skip over the static chain
- slot. */
- tcg_gen_qemu_ld32u(cpu_pc, REG(1), ctx->memidx);
- tcg_gen_addi_i32(t1, REG(1), 8);
- tcg_gen_mov_i32(REG(1), t1);
-
- tcg_temp_free_i32(t1);
-
- /* Jump... */
- tcg_gen_exit_tb(NULL, 0);
-
- ctx->bstate = BS_BRANCH;
- }
- break;
- case 0x05: /* add.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_add_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x06: /* push */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- tcg_gen_subi_i32(t1, REG(a), 4);
- tcg_gen_mov_i32(REG(a), t1);
- tcg_gen_qemu_st32(REG(b), REG(a), ctx->memidx);
- tcg_temp_free_i32(t1);
- }
- break;
- case 0x07: /* pop */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
- TCGv t1 = tcg_temp_new_i32();
-
- tcg_gen_qemu_ld32u(REG(b), REG(a), ctx->memidx);
- tcg_gen_addi_i32(t1, REG(a), 4);
- tcg_gen_mov_i32(REG(a), t1);
- tcg_temp_free_i32(t1);
- }
- break;
- case 0x08: /* lda.l */
- {
- int reg = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld32u(REG(reg), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x09: /* sta.l */
- {
- int val = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st32(REG(val), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x0a: /* ld.l (register indirect) */
- {
- int src = opcode & 0xf;
- int dest = (opcode >> 4) & 0xf;
-
- tcg_gen_qemu_ld32u(REG(dest), REG(src), ctx->memidx);
- }
- break;
- case 0x0b: /* st.l */
- {
- int dest = (opcode >> 4) & 0xf;
- int val = opcode & 0xf;
-
- tcg_gen_qemu_st32(REG(val), REG(dest), ctx->memidx);
- }
- break;
- case 0x0c: /* ldo.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld32u(t2, t1, ctx->memidx);
- tcg_gen_mov_i32(REG(a), t2);
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- case 0x0d: /* sto.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st32(REG(b), t1, ctx->memidx);
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- case 0x0e: /* cmp */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_mov_i32(cc_a, REG(a));
- tcg_gen_mov_i32(cc_b, REG(b));
- }
- break;
- case 0x19: /* jsr */
- {
- int fnreg = (opcode >> 4) & 0xf;
-
- /* Load the stack pointer into T0. */
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
-
- tcg_gen_movi_i32(t1, ctx->pc+2);
-
- /* Make space for the static chain and return address. */
- tcg_gen_subi_i32(t2, REG(1), 8);
- tcg_gen_mov_i32(REG(1), t2);
- tcg_gen_qemu_st32(t1, REG(1), ctx->memidx);
-
- /* Push the current frame pointer. */
- tcg_gen_subi_i32(t2, REG(1), 4);
- tcg_gen_mov_i32(REG(1), t2);
- tcg_gen_qemu_st32(REG(0), REG(1), ctx->memidx);
-
- /* Set the pc and $fp. */
- tcg_gen_mov_i32(REG(0), REG(1));
- tcg_gen_mov_i32(cpu_pc, REG(fnreg));
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
- tcg_gen_exit_tb(NULL, 0);
- ctx->bstate = BS_BRANCH;
- }
- break;
- case 0x1a: /* jmpa */
- {
- tcg_gen_movi_i32(cpu_pc, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_exit_tb(NULL, 0);
- ctx->bstate = BS_BRANCH;
- length = 6;
- }
- break;
- case 0x1b: /* ldi.b (immediate) */
- {
- int reg = (opcode >> 4) & 0xf;
- int val = cpu_ldl_code(env, ctx->pc+2);
- tcg_gen_movi_i32(REG(reg), val);
- length = 6;
- }
- break;
- case 0x1c: /* ld.b (register indirect) */
- {
- int src = opcode & 0xf;
- int dest = (opcode >> 4) & 0xf;
-
- tcg_gen_qemu_ld8u(REG(dest), REG(src), ctx->memidx);
- }
- break;
- case 0x1d: /* lda.b */
- {
- int reg = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld8u(REG(reg), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x1e: /* st.b */
- {
- int dest = (opcode >> 4) & 0xf;
- int val = opcode & 0xf;
-
- tcg_gen_qemu_st8(REG(val), REG(dest), ctx->memidx);
- }
- break;
- case 0x1f: /* sta.b */
- {
- int val = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st8(REG(val), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x20: /* ldi.s (immediate) */
- {
- int reg = (opcode >> 4) & 0xf;
- int val = cpu_ldl_code(env, ctx->pc+2);
- tcg_gen_movi_i32(REG(reg), val);
- length = 6;
- }
- break;
- case 0x21: /* ld.s (register indirect) */
- {
- int src = opcode & 0xf;
- int dest = (opcode >> 4) & 0xf;
-
- tcg_gen_qemu_ld16u(REG(dest), REG(src), ctx->memidx);
- }
- break;
- case 0x22: /* lda.s */
- {
- int reg = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld16u(REG(reg), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x23: /* st.s */
- {
- int dest = (opcode >> 4) & 0xf;
- int val = opcode & 0xf;
-
- tcg_gen_qemu_st16(REG(val), REG(dest), ctx->memidx);
- }
- break;
- case 0x24: /* sta.s */
- {
- int val = (opcode >> 4) & 0xf;
-
- TCGv ptr = tcg_temp_new_i32();
- tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st16(REG(val), ptr, ctx->memidx);
- tcg_temp_free_i32(ptr);
-
- length = 6;
- }
- break;
- case 0x25: /* jmp */
- {
- int reg = (opcode >> 4) & 0xf;
- tcg_gen_mov_i32(cpu_pc, REG(reg));
- tcg_gen_exit_tb(NULL, 0);
- ctx->bstate = BS_BRANCH;
- }
- break;
- case 0x26: /* and */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_and_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x27: /* lshr */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv sv = tcg_temp_new_i32();
- tcg_gen_andi_i32(sv, REG(b), 0x1f);
- tcg_gen_shr_i32(REG(a), REG(a), sv);
- tcg_temp_free_i32(sv);
- }
- break;
- case 0x28: /* ashl */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv sv = tcg_temp_new_i32();
- tcg_gen_andi_i32(sv, REG(b), 0x1f);
- tcg_gen_shl_i32(REG(a), REG(a), sv);
- tcg_temp_free_i32(sv);
- }
- break;
- case 0x29: /* sub.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_sub_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x2a: /* neg */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_neg_i32(REG(a), REG(b));
- }
- break;
- case 0x2b: /* or */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_or_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x2c: /* not */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_not_i32(REG(a), REG(b));
- }
- break;
- case 0x2d: /* ashr */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv sv = tcg_temp_new_i32();
- tcg_gen_andi_i32(sv, REG(b), 0x1f);
- tcg_gen_sar_i32(REG(a), REG(a), sv);
- tcg_temp_free_i32(sv);
- }
- break;
- case 0x2e: /* xor */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_xor_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x2f: /* mul.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- tcg_gen_mul_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x30: /* swi */
- {
- int val = cpu_ldl_code(env, ctx->pc+2);
-
- TCGv temp = tcg_temp_new_i32();
- tcg_gen_movi_i32(temp, val);
- tcg_gen_st_i32(temp, cpu_env,
- offsetof(CPUMoxieState, sregs[3]));
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- tcg_gen_movi_i32(temp, MOXIE_EX_SWI);
- gen_helper_raise_exception(cpu_env, temp);
- tcg_temp_free_i32(temp);
-
- length = 6;
- }
- break;
- case 0x31: /* div.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- gen_helper_div(REG(a), cpu_env, REG(a), REG(b));
- }
- break;
- case 0x32: /* udiv.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- gen_helper_udiv(REG(a), cpu_env, REG(a), REG(b));
- }
- break;
- case 0x33: /* mod.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
- tcg_gen_rem_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x34: /* umod.l */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
- tcg_gen_remu_i32(REG(a), REG(a), REG(b));
- }
- break;
- case 0x35: /* brk */
- {
- TCGv temp = tcg_temp_new_i32();
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- tcg_gen_movi_i32(temp, MOXIE_EX_BREAK);
- gen_helper_raise_exception(cpu_env, temp);
- tcg_temp_free_i32(temp);
- }
- break;
- case 0x36: /* ldo.b */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld8u(t2, t1, ctx->memidx);
- tcg_gen_mov_i32(REG(a), t2);
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- case 0x37: /* sto.b */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st8(REG(b), t1, ctx->memidx);
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- case 0x38: /* ldo.s */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_ld16u(t2, t1, ctx->memidx);
- tcg_gen_mov_i32(REG(a), t2);
-
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- case 0x39: /* sto.s */
- {
- int a = (opcode >> 4) & 0xf;
- int b = opcode & 0xf;
-
- TCGv t1 = tcg_temp_new_i32();
- TCGv t2 = tcg_temp_new_i32();
- tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2));
- tcg_gen_qemu_st16(REG(b), t1, ctx->memidx);
- tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
-
- length = 6;
- }
- break;
- default:
- {
- TCGv temp = tcg_temp_new_i32();
- tcg_gen_movi_i32(cpu_pc, ctx->pc);
- tcg_gen_movi_i32(temp, MOXIE_EX_BAD);
- gen_helper_raise_exception(cpu_env, temp);
- tcg_temp_free_i32(temp);
- }
- break;
- }
- }
-
- return length;
-}
-
-/* generate intermediate code for basic block 'tb'. */
-void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
-{
- CPUMoxieState *env = cs->env_ptr;
- MoxieCPU *cpu = env_archcpu(env);
- DisasContext ctx;
- target_ulong pc_start;
- int num_insns;
-
- pc_start = tb->pc;
- ctx.pc = pc_start;
- ctx.saved_pc = -1;
- ctx.tb = tb;
- ctx.memidx = 0;
- ctx.singlestep_enabled = 0;
- ctx.bstate = BS_NONE;
- num_insns = 0;
-
- gen_tb_start(tb);
- do {
- tcg_gen_insn_start(ctx.pc);
- num_insns++;
-
- if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) {
- tcg_gen_movi_i32(cpu_pc, ctx.pc);
- gen_helper_debug(cpu_env);
- ctx.bstate = BS_EXCP;
- /* The address covered by the breakpoint must be included in
- [tb->pc, tb->pc + tb->size) in order to for it to be
- properly cleared -- thus we increment the PC here so that
- the logic setting tb->size below does the right thing. */
- ctx.pc += 2;
- goto done_generating;
- }
-
- ctx.opcode = cpu_lduw_code(env, ctx.pc);
- ctx.pc += decode_opc(cpu, &ctx);
-
- if (num_insns >= max_insns) {
- break;
- }
- if (cs->singlestep_enabled) {
- break;
- }
- if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) {
- break;
- }
- } while (ctx.bstate == BS_NONE && !tcg_op_buf_full());
-
- if (cs->singlestep_enabled) {
- tcg_gen_movi_tl(cpu_pc, ctx.pc);
- gen_helper_debug(cpu_env);
- } else {
- switch (ctx.bstate) {
- case BS_STOP:
- case BS_NONE:
- gen_goto_tb(env, &ctx, 0, ctx.pc);
- break;
- case BS_EXCP:
- tcg_gen_exit_tb(NULL, 0);
- break;
- case BS_BRANCH:
- default:
- break;
- }
- }
- done_generating:
- gen_tb_end(tb, num_insns);
-
- tb->size = ctx.pc - pc_start;
- tb->icount = num_insns;
-}
-
-void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb,
- target_ulong *data)
-{
- env->pc = data[0];
-}
generated by cgit v1.1 at 2024-12-22 23:58:05 +0000