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-rw-r--r--target/rx/cpu-param.h2
-rw-r--r--target/rx/cpu.c9
-rw-r--r--target/rx/cpu.h4
-rw-r--r--target/rx/helper.c2
-rw-r--r--target/rx/op_helper.c2
5 files changed, 13 insertions, 6 deletions
diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
index ef1970a..84934f3 100644
--- a/target/rx/cpu-param.h
+++ b/target/rx/cpu-param.h
@@ -24,4 +24,6 @@
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#define TARGET_INSN_START_EXTRA_WORDS 0
+
#endif
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 0ba0d55..0a7a2b5 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -24,6 +24,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/translation-block.h"
+#include "exec/target_page.h"
#include "hw/loader.h"
#include "fpu/softfloat.h"
#include "tcg/debug-assert.h"
@@ -66,7 +67,7 @@ static bool rx_cpu_has_work(CPUState *cs)
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR);
}
-static int riscv_cpu_mmu_index(CPUState *cs, bool ifunc)
+static int rx_cpu_mmu_index(CPUState *cs, bool ifunc)
{
return 0;
}
@@ -203,10 +204,15 @@ static const struct SysemuCPUOps rx_sysemu_ops = {
#include "accel/tcg/cpu-ops.h"
static const TCGCPUOps rx_tcg_ops = {
+ /* MTTCG not yet supported: require strict ordering */
+ .guest_default_memory_order = TCG_MO_ALL,
+ .mttcg_supported = false,
+
.initialize = rx_translate_init,
.translate_code = rx_translate_code,
.synchronize_from_tb = rx_cpu_synchronize_from_tb,
.restore_state_to_opc = rx_restore_state_to_opc,
+ .mmu_index = rx_cpu_mmu_index,
.tlb_fill = rx_cpu_tlb_fill,
.cpu_exec_interrupt = rx_cpu_exec_interrupt,
@@ -227,7 +233,6 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data)
&rcc->parent_phases);
cc->class_by_name = rx_cpu_class_by_name;
- cc->mmu_index = riscv_cpu_mmu_index;
cc->dump_state = rx_cpu_dump_state;
cc->set_pc = rx_cpu_set_pc;
cc->get_pc = rx_cpu_get_pc;
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 349d61c..5c19c83 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -23,7 +23,9 @@
#include "hw/registerfields.h"
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#ifdef CONFIG_USER_ONLY
@@ -145,8 +147,6 @@ void rx_translate_code(CPUState *cs, TranslationBlock *tb,
int *max_insns, vaddr pc, void *host_pc);
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
-#include "exec/cpu-all.h"
-
#define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
#define CPU_INTERRUPT_FIR CPU_INTERRUPT_TGT_INT_1
diff --git a/target/rx/helper.c b/target/rx/helper.c
index e8aabf4..0640ab3 100644
--- a/target/rx/helper.c
+++ b/target/rx/helper.c
@@ -20,7 +20,7 @@
#include "qemu/bitops.h"
#include "cpu.h"
#include "exec/log.h"
-#include "exec/cpu_ldst.h"
+#include "accel/tcg/cpu-ldst.h"
#include "hw/irq.h"
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte)
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index b3ed822..a2f1f38 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
-#include "exec/cpu_ldst.h"
+#include "accel/tcg/cpu-ldst.h"
#include "fpu/softfloat.h"
#include "tcg/debug-assert.h"