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-rw-r--r--target/riscv/translate.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 493c381..01cc30a 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -672,10 +672,6 @@ static void gen_set_rm(DisasContext *ctx, int rm)
}
ctx->frm = rm;
- if (rm == RISCV_FRM_ROD) {
- gen_helper_set_rod_rounding_mode(cpu_env);
- return;
- }
if (rm == RISCV_FRM_DYN) {
/* The helper will return only if frm valid. */
ctx->frm_valid = true;