aboutsummaryrefslogtreecommitdiff
path: root/target/riscv/cpu.c
diff options
context:
space:
mode:
Diffstat (limited to 'target/riscv/cpu.c')
-rw-r--r--target/riscv/cpu.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ff766ac..5fb0a61 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -400,6 +400,10 @@ void restore_state_to_opc(CPURISCVState *env, TranslationBlock *tb,
static void riscv_cpu_reset(DeviceState *dev)
{
+#ifndef CONFIG_USER_ONLY
+ uint8_t iprio;
+ int i, irq, rdzero;
+#endif
CPUState *cs = CPU(dev);
RISCVCPU *cpu = RISCV_CPU(cs);
RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu);
@@ -432,6 +436,21 @@ static void riscv_cpu_reset(DeviceState *dev)
env->miclaim = MIP_SGEIP;
env->pc = env->resetvec;
env->two_stage_lookup = false;
+
+ /* Initialized default priorities of local interrupts. */
+ for (i = 0; i < ARRAY_SIZE(env->miprio); i++) {
+ iprio = riscv_cpu_default_priority(i);
+ env->miprio[i] = (i == IRQ_M_EXT) ? 0 : iprio;
+ env->siprio[i] = (i == IRQ_S_EXT) ? 0 : iprio;
+ env->hviprio[i] = 0;
+ }
+ i = 0;
+ while (!riscv_cpu_hviprio_index2irq(i, &irq, &rdzero)) {
+ if (!rdzero) {
+ env->hviprio[irq] = env->miprio[irq];
+ }
+ i++;
+ }
/* mmte is supposed to have pm.current hardwired to 1 */
env->mmte |= (PM_EXT_INITIAL | MMTE_M_PM_CURRENT);
#endif