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-rw-r--r--target/arm/cpu.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 27d9e90..e08b1e7 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1206,6 +1206,35 @@ static void cortex_m4_initfn(Object *obj)
cpu->id_isar5 = 0x00000000;
}
+static void cortex_m33_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ set_feature(&cpu->env, ARM_FEATURE_V8);
+ set_feature(&cpu->env, ARM_FEATURE_M);
+ set_feature(&cpu->env, ARM_FEATURE_M_SECURITY);
+ set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
+ cpu->midr = 0x410fd213; /* r0p3 */
+ cpu->pmsav7_dregion = 16;
+ cpu->sau_sregion = 8;
+ cpu->id_pfr0 = 0x00000030;
+ cpu->id_pfr1 = 0x00000210;
+ cpu->id_dfr0 = 0x00200000;
+ cpu->id_afr0 = 0x00000000;
+ cpu->id_mmfr0 = 0x00101F40;
+ cpu->id_mmfr1 = 0x00000000;
+ cpu->id_mmfr2 = 0x01000000;
+ cpu->id_mmfr3 = 0x00000000;
+ cpu->id_isar0 = 0x01101110;
+ cpu->id_isar1 = 0x02212000;
+ cpu->id_isar2 = 0x20232232;
+ cpu->id_isar3 = 0x01111131;
+ cpu->id_isar4 = 0x01310132;
+ cpu->id_isar5 = 0x00000000;
+ cpu->clidr = 0x00000000;
+ cpu->ctr = 0x8000c000;
+}
+
static void arm_v7m_class_init(ObjectClass *oc, void *data)
{
CPUClass *cc = CPU_CLASS(oc);
@@ -1697,6 +1726,8 @@ static const ARMCPUInfo arm_cpus[] = {
.class_init = arm_v7m_class_init },
{ .name = "cortex-m4", .initfn = cortex_m4_initfn,
.class_init = arm_v7m_class_init },
+ { .name = "cortex-m33", .initfn = cortex_m33_initfn,
+ .class_init = arm_v7m_class_init },
{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },