diff options
Diffstat (limited to 'target/arm/tcg/translate.c')
| -rw-r--r-- | target/arm/tcg/translate.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 39541ec..38ad8dd 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -2946,13 +2946,11 @@ void gen_gvec_sqrdmlsh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, #define GEN_CMP0(NAME, COND) \ static void gen_##NAME##0_i32(TCGv_i32 d, TCGv_i32 a) \ { \ - tcg_gen_setcondi_i32(COND, d, a, 0); \ - tcg_gen_neg_i32(d, d); \ + tcg_gen_negsetcond_i32(COND, d, a, tcg_constant_i32(0)); \ } \ static void gen_##NAME##0_i64(TCGv_i64 d, TCGv_i64 a) \ { \ - tcg_gen_setcondi_i64(COND, d, a, 0); \ - tcg_gen_neg_i64(d, d); \ + tcg_gen_negsetcond_i64(COND, d, a, tcg_constant_i64(0)); \ } \ static void gen_##NAME##0_vec(unsigned vece, TCGv_vec d, TCGv_vec a) \ { \ @@ -3863,15 +3861,13 @@ void gen_gvec_mls(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, static void gen_cmtst_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b) { tcg_gen_and_i32(d, a, b); - tcg_gen_setcondi_i32(TCG_COND_NE, d, d, 0); - tcg_gen_neg_i32(d, d); + tcg_gen_negsetcond_i32(TCG_COND_NE, d, d, tcg_constant_i32(0)); } void gen_cmtst_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) { tcg_gen_and_i64(d, a, b); - tcg_gen_setcondi_i64(TCG_COND_NE, d, d, 0); - tcg_gen_neg_i64(d, d); + tcg_gen_negsetcond_i64(TCG_COND_NE, d, d, tcg_constant_i64(0)); } static void gen_cmtst_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b) |