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authorStefan Hajnoczi <stefanha@redhat.com>2022-11-14 13:31:17 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2022-11-14 13:31:17 -0500
commit98f10f0e2613ba1ac2ad3f57a5174014f6dcb03d (patch)
treeebbd542126edded7e8221816f87d5bd50ae59114 /util
parent305f6f62d9d250a32cdf090ddcb7e3a5b26a342e (diff)
parentd9721f19cd05a382f4f5a7093c80d1c4a8a1aa82 (diff)
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Merge tag 'pull-target-arm-20221114' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/intc/arm_gicv3: fix prio masking on pmr write * MAINTAINERS: Update maintainer's email for Xilinx CAN # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmNyY7cZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mrBD/4mG6AMW4CGROWq3u3F8STK # 22uxpilhyBmPawBykUC8dYId8A0GjGqeJ5HRhYE/0ZKqlk9GtFBI4YHM8ccocozK # VdgKP7VvXNiBwjV2kQ3mdZnfXRnNWLTnGQd9Q/9EjU+FOBz4hsOoRh8rv+9t2inn # dtXV8wbLYQYHCgVPAwTP39DXzF0YQ5sAjVxbjC1lFE6k3pAcDvoGKKcWt9GOI5m1 # 5ImPgnVdunscqA9otvl56a03M5TbdH8KiAEARo3juFYYEHkl4qD2E2CK6On8wTIA # 7zeSoxvTDDYD6mcV/RwFuEcOr+YIFpxeGxes9PKpnYh8Dpx9YPeIYRsK5qTI7QUz # Ldbz9PnZE6DPaPsT67kzFnfx4se6q10d5wXaK8VsFBOZ4V9yYONaXlHiZbgpWn/K # jlbiJFtehCA0iS4D6YcoDTqL88M/RM5cbj/5tht8sxrl9HJ3r/hxdJ7W+zqpTg2j # 3TV+j9okLqyq/4RIFZbf5yVPFPMtF/FOIl95ZAHmvJYjC/L9yXRT6Y5EdKfZPwMe # 5FBjdly4gsUqNxFUfPByRVtaoelxjXi/+0wHXWZNw8Naco3yd7VMoqIRLDE4qhY5 # GfjF2Aai7PHiwb2VE+mIIfz+ldEk5XHFYlXBtUOwt8q2UUnmYsVqh8zFpTYLaDdY # RezkZM4yMYx38GPWCvAvlg== # =clh5 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 14 Nov 2022 10:50:15 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221114' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/intc/arm_gicv3: fix prio masking on pmr write MAINTAINERS: Update maintainer's email for Xilinx CAN Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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