diff options
| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-07 17:45:15 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-07 17:45:15 +0000 |
| commit | b6d17150af9930f28aec1debc41f6c5f9ddcc3ba (patch) | |
| tree | 60d1aee5c860755259cb734954da1ceea0648f3b /tcg/x86_64/tcg-target.c | |
| parent | 4a7f0e0655689b0e5fc84d85ce167d3053fe43ef (diff) | |
| download | qemu-b6d17150af9930f28aec1debc41f6c5f9ddcc3ba.zip qemu-b6d17150af9930f28aec1debc41f6c5f9ddcc3ba.tar.gz qemu-b6d17150af9930f28aec1debc41f6c5f9ddcc3ba.tar.bz2 | |
Implement TCG sign extension ops for x86-64.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/x86_64/tcg-target.c')
| -rw-r--r-- | tcg/x86_64/tcg-target.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c index 183816a..38e164e 100644 --- a/tcg/x86_64/tcg-target.c +++ b/tcg/x86_64/tcg-target.c @@ -1070,6 +1070,22 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]); break; + case INDEX_op_ext8s_i32: + tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]); + break; + case INDEX_op_ext16s_i32: + tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]); + break; + case INDEX_op_ext8s_i64: + tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, args[0], args[1]); + break; + case INDEX_op_ext16s_i64: + tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, args[0], args[1]); + break; + case INDEX_op_ext32s_i64: + tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]); + break; + case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); break; @@ -1228,6 +1244,12 @@ static const TCGTargetOpDef x86_64_op_defs[] = { { INDEX_op_neg_i32, { "r", "0" } }, { INDEX_op_neg_i64, { "r", "0" } }, + { INDEX_op_ext8s_i32, { "r", "r"} }, + { INDEX_op_ext16s_i32, { "r", "r"} }, + { INDEX_op_ext8s_i64, { "r", "r"} }, + { INDEX_op_ext16s_i64, { "r", "r"} }, + { INDEX_op_ext32s_i64, { "r", "r"} }, + { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } }, { INDEX_op_qemu_ld16u, { "r", "L" } }, |