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-rw-r--r--tcg/x86_64/tcg-target.c22
-rw-r--r--tcg/x86_64/tcg-target.h5
2 files changed, 27 insertions, 0 deletions
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index 183816a..38e164e 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -1070,6 +1070,22 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
break;
+ case INDEX_op_ext8s_i32:
+ tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]);
+ break;
+ case INDEX_op_ext16s_i32:
+ tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
+ break;
+ case INDEX_op_ext8s_i64:
+ tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext16s_i64:
+ tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext32s_i64:
+ tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
+ break;
+
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
break;
@@ -1228,6 +1244,12 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ INDEX_op_neg_i32, { "r", "0" } },
{ INDEX_op_neg_i64, { "r", "0" } },
+ { INDEX_op_ext8s_i32, { "r", "r"} },
+ { INDEX_op_ext16s_i32, { "r", "r"} },
+ { INDEX_op_ext8s_i64, { "r", "r"} },
+ { INDEX_op_ext16s_i64, { "r", "r"} },
+ { INDEX_op_ext32s_i64, { "r", "r"} },
+
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },
{ INDEX_op_qemu_ld16u, { "r", "L" } },
diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
index 32486bc..9a0cca0 100644
--- a/tcg/x86_64/tcg-target.h
+++ b/tcg/x86_64/tcg-target.h
@@ -60,6 +60,11 @@ enum {
#define TCG_TARGET_HAS_bswap_i64
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_neg_i64
+#define TCG_TARGET_HAS_ext8s_i32
+#define TCG_TARGET_HAS_ext16s_i32
+#define TCG_TARGET_HAS_ext8s_i64
+#define TCG_TARGET_HAS_ext16s_i64
+#define TCG_TARGET_HAS_ext32s_i64
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R14