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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-01 18:33:57 -0700 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2022-06-02 09:35:03 +0200 |
| commit | cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf (patch) | |
| tree | 83fd33932cdbf0910764c2118740535e8251413e /target | |
| parent | 43accc4862e0a88710411b205fdaf833dadf9951 (diff) | |
| download | qemu-cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf.zip qemu-cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf.tar.gz qemu-cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf.tar.bz2 | |
target/m68k: Implement FTRAPcc
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target')
| -rw-r--r-- | target/m68k/translate.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0dfddaa..8f3c298 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -5566,6 +5566,34 @@ DISAS_INSN(fscc) tcg_temp_free(tmp); } +DISAS_INSN(ftrapcc) +{ + DisasCompare c; + uint16_t ext; + int cond; + + ext = read_im16(env, s); + cond = ext & 0x3f; + + /* Consume and discard the immediate operand. */ + switch (extract32(insn, 0, 3)) { + case 2: /* ftrapcc.w */ + (void)read_im16(env, s); + break; + case 3: /* ftrapcc.l */ + (void)read_im32(env, s); + break; + case 4: /* ftrapcc (no operand) */ + break; + default: + /* ftrapcc registered with only valid opmodes */ + g_assert_not_reached(); + } + + gen_fcc_cond(&c, s, cond); + do_trapcc(s, &c); +} + #if defined(CONFIG_SOFTMMU) DISAS_INSN(frestore) { @@ -6192,6 +6220,8 @@ void register_m68k_insns (CPUM68KState *env) INSN(fbcc, f280, ffc0, CF_FPU); INSN(fpu, f200, ffc0, FPU); INSN(fscc, f240, ffc0, FPU); + INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */ + INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */ INSN(fbcc, f280, ff80, FPU); #if defined(CONFIG_SOFTMMU) INSN(frestore, f340, ffc0, CF_FPU); |