diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2022-08-05 12:55:53 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2022-08-05 12:55:53 -0700 |
commit | c669f22f1a47897e8d1d595d6b8a59a572f9158c (patch) | |
tree | 78402680f5053c93b025b65302b774a0bc4a169c /target | |
parent | e0d8bb9800bc11fbb067c4ee504751a3521ac35e (diff) | |
parent | 2f149c759ff352399e7a0eca25a62388822d7d13 (diff) | |
download | qemu-c669f22f1a47897e8d1d595d6b8a59a572f9158c.zip qemu-c669f22f1a47897e8d1d595d6b8a59a572f9158c.tar.gz qemu-c669f22f1a47897e8d1d595d6b8a59a572f9158c.tar.bz2 |
Merge tag 'pull-la-20220805' of https://gitlab.com/rth7680/qemu into staging
LoongArch updates:
Store value in SET_FPU_* macros.
Fix unused variable Werrors in acpi-build.c
Update xml to match upstream gdb.
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLtdTodHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/u3Qf/XON//wiT054wyL3a
# wCZ7c4A96zA0Zu+S1FSo4CZ81wCUpAF5b76fhIU5GrLuWrs/UzOcn+akS8LNLLcM
# nQHqbYNQbkTGOj6DwlZfts8Ul/Ki/Yimjh0gBLFGepzYrsahJ4dCVwQR/KZNkMKf
# xwBn3+yq96DzEmIqjqEQtlet3Wmsow/zDU+RuHbtdrFiSx6MwhLo/e+dHVEEPkEL
# EBmFNETcmAzIg+oFfifkP1ZHgL/Nt2yjElwFZM2pKLMgANVpHOpCTap03KAO/xTt
# LzX5nmJ+4MYPyoEchRaNuq5sB5GqicDGuwGPdhu6qOV589duZ64M4dfm9ErTKEFA
# eE27rA==
# =fcsy
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 Aug 2022 12:53:30 PM PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-la-20220805' of https://gitlab.com/rth7680/qemu:
target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()
target/loongarch: Update loongarch-fpu.xml
target/loongarch: update loongarch-base64.xml
target/loongarch: add gdb_arch_name()
target/loongarch: Fix GDB get the wrong pc
hw/loongarch: remove acpi-build.c unused variable 'aml_len'
target/loongarch: Fix macros SET_FPU_* in cpu.h
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/loongarch/cpu.c | 8 | ||||
-rw-r--r-- | target/loongarch/cpu.h | 18 | ||||
-rw-r--r-- | target/loongarch/gdbstub.c | 43 | ||||
-rw-r--r-- | target/loongarch/internals.h | 3 |
4 files changed, 58 insertions, 14 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 1c69a76..941e277 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -661,6 +661,11 @@ static const struct SysemuCPUOps loongarch_sysemu_ops = { }; #endif +static gchar *loongarch_gdb_arch_name(CPUState *cs) +{ + return g_strdup("loongarch64"); +} + static void loongarch_cpu_class_init(ObjectClass *c, void *data) { LoongArchCPUClass *lacc = LOONGARCH_CPU_CLASS(c); @@ -683,9 +688,10 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) cc->gdb_read_register = loongarch_cpu_gdb_read_register; cc->gdb_write_register = loongarch_cpu_gdb_write_register; cc->disas_set_info = loongarch_cpu_disas_set_info; - cc->gdb_num_core_regs = 34; + cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_stop_before_watchpoint = true; + cc->gdb_arch_name = loongarch_gdb_arch_name; #ifdef CONFIG_TCG cc->tcg_ops = &loongarch_tcg_ops; diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index a36349d..dce999a 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -47,11 +47,23 @@ FIELD(FCSR0, FLAGS, 16, 5) FIELD(FCSR0, CAUSE, 24, 5) #define GET_FP_CAUSE(REG) FIELD_EX32(REG, FCSR0, CAUSE) -#define SET_FP_CAUSE(REG, V) FIELD_DP32(REG, FCSR0, CAUSE, V) +#define SET_FP_CAUSE(REG, V) \ + do { \ + (REG) = FIELD_DP32(REG, FCSR0, CAUSE, V); \ + } while (0) + #define GET_FP_ENABLES(REG) FIELD_EX32(REG, FCSR0, ENABLES) -#define SET_FP_ENABLES(REG, V) FIELD_DP32(REG, FCSR0, ENABLES, V) +#define SET_FP_ENABLES(REG, V) \ + do { \ + (REG) = FIELD_DP32(REG, FCSR0, ENABLES, V); \ + } while (0) + #define GET_FP_FLAGS(REG) FIELD_EX32(REG, FCSR0, FLAGS) -#define SET_FP_FLAGS(REG, V) FIELD_DP32(REG, FCSR0, FLAGS, V) +#define SET_FP_FLAGS(REG, V) \ + do { \ + (REG) = FIELD_DP32(REG, FCSR0, FLAGS, V); \ + } while (0) + #define UPDATE_FP_FLAGS(REG, V) \ do { \ (REG) |= FIELD_DP32(0, FCSR0, FLAGS, V); \ diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 24e126f..a4d1e28 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -11,6 +11,24 @@ #include "internals.h" #include "exec/gdbstub.h" +uint64_t read_fcc(CPULoongArchState *env) +{ + uint64_t ret = 0; + + for (int i = 0; i < 8; ++i) { + ret |= (uint64_t)env->cf[i] << (i * 8); + } + + return ret; +} + +void write_fcc(CPULoongArchState *env, uint64_t val) +{ + for (int i = 0; i < 8; ++i) { + env->cf[i] = (val >> (i * 8)) & 1; + } +} + int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { LoongArchCPU *cpu = LOONGARCH_CPU(cs); @@ -19,8 +37,11 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) if (0 <= n && n < 32) { return gdb_get_regl(mem_buf, env->gpr[n]); } else if (n == 32) { - return gdb_get_regl(mem_buf, env->pc); + /* orig_a0 */ + return gdb_get_regl(mem_buf, 0); } else if (n == 33) { + return gdb_get_regl(mem_buf, env->pc); + } else if (n == 34) { return gdb_get_regl(mem_buf, env->CSR_BADV); } return 0; @@ -36,7 +57,7 @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) if (0 <= n && n < 32) { env->gpr[n] = tmp; length = sizeof(target_ulong); - } else if (n == 32) { + } else if (n == 33) { env->pc = tmp; length = sizeof(target_ulong); } @@ -48,9 +69,10 @@ static int loongarch_gdb_get_fpu(CPULoongArchState *env, { if (0 <= n && n < 32) { return gdb_get_reg64(mem_buf, env->fpr[n]); - } else if (32 <= n && n < 40) { - return gdb_get_reg8(mem_buf, env->cf[n - 32]); - } else if (n == 40) { + } else if (n == 32) { + uint64_t val = read_fcc(env); + return gdb_get_reg64(mem_buf, val); + } else if (n == 33) { return gdb_get_reg32(mem_buf, env->fcsr0); } return 0; @@ -64,10 +86,11 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env, if (0 <= n && n < 32) { env->fpr[n] = ldq_p(mem_buf); length = 8; - } else if (32 <= n && n < 40) { - env->cf[n - 32] = ldub_p(mem_buf); - length = 1; - } else if (n == 40) { + } else if (n == 32) { + uint64_t val = ldq_p(mem_buf); + write_fcc(env, val); + length = 8; + } else if (n == 33) { env->fcsr0 = ldl_p(mem_buf); length = 4; } @@ -77,5 +100,5 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env, void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs) { gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu, - 41, "loongarch-fpu64.xml", 0); + 41, "loongarch-fpu.xml", 0); } diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h index ea22736..f01635a 100644 --- a/target/loongarch/internals.h +++ b/target/loongarch/internals.h @@ -51,6 +51,9 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); #endif /* !CONFIG_USER_ONLY */ +uint64_t read_fcc(CPULoongArchState *env); +void write_fcc(CPULoongArchState *env, uint64_t val); + int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n); int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n); void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs); |