aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2024-01-29 09:12:17 +1000
committerRichard Henderson <richard.henderson@linaro.org>2024-02-03 08:52:25 +1000
commitb9e877f20f22b308ef2c2fd5e3e7c3b6295db994 (patch)
treeb64b94a394d64831874ee8cd51d63d93ae4779d7 /target
parent628421c74a64bcc7b4eda1218a66b77e89e02d4f (diff)
downloadqemu-b9e877f20f22b308ef2c2fd5e3e7c3b6295db994.zip
qemu-b9e877f20f22b308ef2c2fd5e3e7c3b6295db994.tar.gz
qemu-b9e877f20f22b308ef2c2fd5e3e7c3b6295db994.tar.bz2
target/avr: Populate CPUClass.mmu_index
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/avr/cpu.c6
-rw-r--r--target/avr/cpu.h4
2 files changed, 7 insertions, 3 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 1c68748..a40f445 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -50,6 +50,11 @@ static bool avr_cpu_has_work(CPUState *cs)
&& cpu_interrupts_enabled(env);
}
+static int avr_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+ return ifetch ? MMU_CODE_IDX : MMU_DATA_IDX;
+}
+
static void avr_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
@@ -236,6 +241,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = avr_cpu_class_by_name;
cc->has_work = avr_cpu_has_work;
+ cc->mmu_index = avr_cpu_mmu_index;
cc->dump_state = avr_cpu_dump_state;
cc->set_pc = avr_cpu_set_pc;
cc->get_pc = avr_cpu_get_pc;
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 7d5dd42..4595c6b 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -184,9 +184,7 @@ static inline void set_avr_feature(CPUAVRState *env, int feature)
env->features |= (1U << feature);
}
-#define cpu_mmu_index avr_cpu_mmu_index
-
-static inline int avr_cpu_mmu_index(CPUAVRState *env, bool ifetch)
+static inline int cpu_mmu_index(CPUAVRState *env, bool ifetch)
{
return ifetch ? MMU_CODE_IDX : MMU_DATA_IDX;
}