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authorPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:48 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:48 +0000
commitb7ecc3da6c87f8a57805acfc46922684f8a26eea (patch)
tree428fb6718860cf9fdf996131568994af3520b69b /target
parent67d10fc4737a44366524295ea6049841e5e593e6 (diff)
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target/arm: Make NV reads of CurrentEL return EL2
FEAT_NV requires that when HCR_EL2.NV is set reads of the CurrentEL register from EL1 always report EL2 rather than the real EL. Implement this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'target')
-rw-r--r--target/arm/tcg/translate-a64.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index f5377db..ed1cc01 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -2241,12 +2241,17 @@ static void handle_sys(DisasContext *s, bool isread,
}
return;
case ARM_CP_CURRENTEL:
- /* Reads as current EL value from pstate, which is
+ {
+ /*
+ * Reads as current EL value from pstate, which is
* guaranteed to be constant by the tb flags.
+ * For nested virt we should report EL2.
*/
+ int el = s->nv ? 2 : s->current_el;
tcg_rt = cpu_reg(s, rt);
- tcg_gen_movi_i64(tcg_rt, s->current_el << 2);
+ tcg_gen_movi_i64(tcg_rt, el << 2);
return;
+ }
case ARM_CP_DC_ZVA:
/* Writes clear the aligned block of memory which rt points into. */
if (s->mte_active[0]) {