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author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-10-09 12:35:04 +0200 |
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committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-11-07 12:13:27 +0100 |
commit | a9e445df545158e3d6e3239f10c2e88d8119fdd1 (patch) | |
tree | 38d0977c43777a6a1376f56c6fa543392fd3f1b3 /target | |
parent | 82b641d6261a58d9fba5a6ce786e7d58a8876e25 (diff) | |
download | qemu-a9e445df545158e3d6e3239f10c2e88d8119fdd1.zip qemu-a9e445df545158e3d6e3239f10c2e88d8119fdd1.tar.gz qemu-a9e445df545158e3d6e3239f10c2e88d8119fdd1.tar.bz2 |
target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]()
When CPUArchState* is available (here CPUX86State*), we can
use the fast env_archcpu() macro to get ArchCPU* (here X86CPU*).
The QOM cast X86_CPU() macro will be slower when building with
--enable-qom-cast-debug.
Pass CPUX86State* as argument to simulate_rdmsr / simulate_wrmsr
instead of a CPUState* to avoid an extra cast.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Roman Bolshakov <roman@roolebo.dev>
Tested-by: Roman Bolshakov <roman@roolebo.dev>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231009110239.66778-7-philmd@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/i386/hvf/hvf.c | 4 | ||||
-rw-r--r-- | target/i386/hvf/x86_emu.c | 21 | ||||
-rw-r--r-- | target/i386/hvf/x86_emu.h | 4 |
3 files changed, 14 insertions, 15 deletions
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index cb2cd0b..20b9ca3 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -591,9 +591,9 @@ int hvf_vcpu_exec(CPUState *cpu) { load_regs(cpu); if (exit_reason == EXIT_REASON_RDMSR) { - simulate_rdmsr(cpu); + simulate_rdmsr(env); } else { - simulate_wrmsr(cpu); + simulate_wrmsr(env); } env->eip += ins_len; store_regs(cpu); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index af1f205..b1f8a68 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -663,11 +663,10 @@ static void exec_lods(CPUX86State *env, struct x86_decode *decode) env->eip += decode->len; } -void simulate_rdmsr(struct CPUState *cpu) +void simulate_rdmsr(CPUX86State *env) { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; - CPUState *cs = env_cpu(env); + X86CPU *x86_cpu = env_archcpu(env); + CPUState *cpu = env_cpu(env); uint32_t msr = ECX(env); uint64_t val = 0; @@ -746,8 +745,8 @@ void simulate_rdmsr(struct CPUState *cpu) val = env->mtrr_deftype; break; case MSR_CORE_THREAD_COUNT: - val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ - val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */ + val = cpu->nr_threads * cpu->nr_cores; /* thread count, bits 15..0 */ + val |= ((uint32_t)cpu->nr_cores << 16); /* core count, bits 31..16 */ break; default: /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */ @@ -761,14 +760,14 @@ void simulate_rdmsr(struct CPUState *cpu) static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_rdmsr(env_cpu(env)); + simulate_rdmsr(env); env->eip += decode->len; } -void simulate_wrmsr(struct CPUState *cpu) +void simulate_wrmsr(CPUX86State *env) { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; + X86CPU *x86_cpu = env_archcpu(env); + CPUState *cpu = env_cpu(env); uint32_t msr = ECX(env); uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env); @@ -856,7 +855,7 @@ void simulate_wrmsr(struct CPUState *cpu) static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_wrmsr(env_cpu(env)); + simulate_wrmsr(env); env->eip += decode->len; } diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 640da90..4b846ba 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -29,8 +29,8 @@ bool exec_instruction(CPUX86State *env, struct x86_decode *ins); void load_regs(struct CPUState *cpu); void store_regs(struct CPUState *cpu); -void simulate_rdmsr(struct CPUState *cpu); -void simulate_wrmsr(struct CPUState *cpu); +void simulate_rdmsr(CPUX86State *env); +void simulate_wrmsr(CPUX86State *env); target_ulong read_reg(CPUX86State *env, int reg, int size); void write_reg(CPUX86State *env, int reg, target_ulong val, int size); |