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authorRichard Henderson <richard.henderson@linaro.org>2024-03-26 13:54:01 -1000
committerRichard Henderson <richard.henderson@linaro.org>2024-05-15 10:03:44 +0200
commita0ea4becca28c1c14de5c3b8bff8343ab184070c (patch)
tree549c53a92b0795d04e76ca9a24079b204eb39bbd /target
parent269ca0a9ccaafd023b7c1fc914c1386128796fb0 (diff)
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target/hppa: Use delay_excp for conditional trap on overflow
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/hppa/helper.h1
-rw-r--r--target/hppa/int_helper.c2
-rw-r--r--target/hppa/op_helper.c7
-rw-r--r--target/hppa/translate.c21
4 files changed, 14 insertions, 17 deletions
diff --git a/target/hppa/helper.h b/target/hppa/helper.h
index 3d0d143..c12b48a 100644
--- a/target/hppa/helper.h
+++ b/target/hppa/helper.h
@@ -1,5 +1,4 @@
DEF_HELPER_2(excp, noreturn, env, int)
-DEF_HELPER_FLAGS_2(tsv, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl)
DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index 1aa3e88..97e5f0b 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -134,13 +134,13 @@ void hppa_cpu_do_interrupt(CPUState *cs)
switch (i) {
case EXCP_ILL:
case EXCP_BREAK:
+ case EXCP_OVERFLOW:
case EXCP_COND:
case EXCP_PRIV_REG:
case EXCP_PRIV_OPR:
/* IIR set via translate.c. */
break;
- case EXCP_OVERFLOW:
case EXCP_ASSIST:
case EXCP_DTLB_MISS:
case EXCP_NA_ITLB_MISS:
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index a8b69fd..66cad78 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -42,13 +42,6 @@ G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
cpu_loop_exit_restore(cs, ra);
}
-void HELPER(tsv)(CPUHPPAState *env, target_ulong cond)
-{
- if (unlikely((target_long)cond < 0)) {
- hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC());
- }
-}
-
static void atomic_store_mask32(CPUHPPAState *env, target_ulong addr,
uint32_t val, uint32_t mask, uintptr_t ra)
{
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ae29112..16b25a9 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1136,6 +1136,17 @@ static void gen_tc(DisasContext *ctx, DisasCond *cond)
}
}
+static void gen_tsv(DisasContext *ctx, TCGv_i64 *sv, bool d)
+{
+ DisasCond cond = do_cond(ctx, /* SV */ 12, d, NULL, NULL, *sv);
+ DisasDelayException *e = delay_excp(ctx, EXCP_OVERFLOW);
+
+ tcg_gen_brcond_i64(cond.c, cond.a0, cond.a1, e->lab);
+
+ /* In the non-trap path, V is known zero. */
+ *sv = tcg_constant_i64(0);
+}
+
static void do_add(DisasContext *ctx, unsigned rt, TCGv_i64 orig_in1,
TCGv_i64 in2, unsigned shift, bool is_l,
bool is_tsv, bool is_tc, bool is_c, unsigned cf, bool d)
@@ -1178,10 +1189,7 @@ static void do_add(DisasContext *ctx, unsigned rt, TCGv_i64 orig_in1,
if (is_tsv || cond_need_sv(c)) {
sv = do_add_sv(ctx, dest, in1, in2, orig_in1, shift, d);
if (is_tsv) {
- if (!d) {
- tcg_gen_ext32s_i64(sv, sv);
- }
- gen_helper_tsv(tcg_env, sv);
+ gen_tsv(ctx, &sv, d);
}
}
@@ -1282,10 +1290,7 @@ static void do_sub(DisasContext *ctx, unsigned rt, TCGv_i64 in1,
if (is_tsv || cond_need_sv(c)) {
sv = do_sub_sv(ctx, dest, in1, in2);
if (is_tsv) {
- if (!d) {
- tcg_gen_ext32s_i64(sv, sv);
- }
- gen_helper_tsv(tcg_env, sv);
+ gen_tsv(ctx, &sv, d);
}
}