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authorPeter Maydell <peter.maydell@linaro.org>2017-04-20 17:32:30 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-04-20 17:39:17 +0100
commit9d7c59c84d4530d05e8702b1c3a31e6da00a397e (patch)
treea03c659705056bee8b10fc4ce99d966541dade6e /target
parent20bff2130753b5b38d90afee83f2b43a803bc320 (diff)
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arm: Don't implement BXJ on M-profile CPUs
For M-profile CPUs, the BXJ instruction does not exist at all, and the encoding should always UNDEF. We were accidentally implementing it to behave like A-profile BXJ; correct the error. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1491844419-12485-2-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target')
-rw-r--r--target/arm/translate.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index e32e38c..fe3f442 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10485,7 +10485,12 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
}
break;
case 4: /* bxj */
- /* Trivial implementation equivalent to bx. */
+ /* Trivial implementation equivalent to bx.
+ * This instruction doesn't exist at all for M-profile.
+ */
+ if (arm_dc_feature(s, ARM_FEATURE_M)) {
+ goto illegal_op;
+ }
tmp = load_reg(s, rn);
gen_bx(s, tmp);
break;