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author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-04-30 16:43:09 +0200 |
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committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-05-03 17:33:26 +0200 |
commit | 942ba09d7cfc11b8a149011a201d274902731333 (patch) | |
tree | 184a4faec344d2a98834f646a9e52d77c7ffaa3d /target | |
parent | 40ed073f893b1aaebbd7f2ef1259bab9a0cea46f (diff) | |
download | qemu-942ba09d7cfc11b8a149011a201d274902731333.zip qemu-942ba09d7cfc11b8a149011a201d274902731333.tar.gz qemu-942ba09d7cfc11b8a149011a201d274902731333.tar.bz2 |
target/sh4: Rename TCGv variables as manual for SUBV opcode
To easily compare with the SH4 manual, rename:
REG(B11_8) -> Rn
REG(B7_4) -> Rm
t0 -> result
Mention how underflow is calculated.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240430163125.77430-5-philmd@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/sh4/translate.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 47c0f34..e599ab9 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -933,16 +933,20 @@ static void _decode_opc(DisasContext * ctx) return; case 0x300b: /* subv Rm,Rn */ { - TCGv t0, t1, t2; - t0 = tcg_temp_new(); - tcg_gen_sub_i32(t0, REG(B11_8), REG(B7_4)); + TCGv Rn = REG(B11_8); + TCGv Rm = REG(B7_4); + TCGv result, t1, t2; + + result = tcg_temp_new(); t1 = tcg_temp_new(); - tcg_gen_xor_i32(t1, t0, REG(B11_8)); t2 = tcg_temp_new(); - tcg_gen_xor_i32(t2, REG(B11_8), REG(B7_4)); + tcg_gen_sub_i32(result, Rn, Rm); + /* T = ((Rn ^ Rm) & (Result ^ Rn)) >> 31 */ + tcg_gen_xor_i32(t1, result, Rn); + tcg_gen_xor_i32(t2, Rn, Rm); tcg_gen_and_i32(t1, t1, t2); tcg_gen_shri_i32(cpu_sr_t, t1, 31); - tcg_gen_mov_i32(REG(B11_8), t0); + tcg_gen_mov_i32(Rn, result); } return; case 0x2008: /* tst Rm,Rn */ |