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authorRichard Henderson <richard.henderson@linaro.org>2019-09-04 12:30:56 -0700
committerPeter Maydell <peter.maydell@linaro.org>2019-09-05 13:23:04 +0100
commit8d4a4dc849a28aded8f335a25b223e8e3391b6f2 (patch)
treed257b75f6232b6da8891997a20eba2b7fce06fb0 /target
parent46beb58efbb8a2a32f601a041aa22801a3138ece (diff)
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target/arm: Convert T16, Unconditional branch
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-67-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/t16.decode6
-rw-r--r--target/arm/translate.c9
2 files changed, 8 insertions, 7 deletions
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index 0b4da41..a4c89db 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -266,3 +266,9 @@ LDM_t16 1011 110 ......... \
SVC 1101 1111 imm:8 &i
B_cond_thumb 1101 cond:4 ........ &ci imm=%imm8_0x2
}
+
+# Unconditional Branch
+
+%imm11_0x2 0:s11 !function=times_2
+
+B 11100 ........... &i imm=%imm11_0x2
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4f4c77f..3238ccb 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10736,7 +10736,6 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
- uint32_t val;
int32_t offset;
TCGv_i32 tmp;
TCGv_i32 tmp2;
@@ -10780,12 +10779,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
gen_bx(s, tmp);
break;
}
- /* unconditional branch */
- val = read_pc(s);
- offset = ((int32_t)insn << 21) >> 21;
- val += offset << 1;
- gen_jmp(s, val);
- break;
+ /* unconditional branch, in decodetree */
+ goto illegal_op;
case 15:
/* thumb_insn_is_16bit() ensures we can't get here for