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authorDavid Hildenbrand <david@redhat.com>2019-04-11 09:41:29 +0200
committerDavid Hildenbrand <david@redhat.com>2019-05-17 10:54:13 +0200
commit801aa78bd02100b34ddb3a4c94cc4cf4a4ae1844 (patch)
tree14a316c33675fdbe38f6deaa75e645efc5107801 /target
parentc1a81d4b12b8f519863db6d7a0048b5cd0a802f0 (diff)
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s390x/tcg: Implement VECTOR AVERAGE LOGICAL
Similar to VECTOR AVERAGE but without sign extension. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/s390x/helper.h2
-rw-r--r--target/s390x/insn-data.def2
-rw-r--r--target/s390x/translate_vx.inc.c48
-rw-r--r--target/s390x/vec_int_helper.c16
4 files changed, 68 insertions, 0 deletions
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index add1d33..2192139 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -148,6 +148,8 @@ DEF_HELPER_FLAGS_4(vstl, TCG_CALL_NO_WG, void, env, cptr, i64, i64)
/* === Vector Integer Instructions === */
DEF_HELPER_FLAGS_4(gvec_vavg8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vavg16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vavgl8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_4(gvec_vavgl16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 6f8b42e..9889dc0 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1070,6 +1070,8 @@
F(0xe769, VNC, VRR_c, V, 0, 0, 0, 0, vnc, 0, IF_VEC)
/* VECTOR AVERAGE */
F(0xe7f2, VAVG, VRR_c, V, 0, 0, 0, 0, vavg, 0, IF_VEC)
+/* VECTOR AVERAGE LOGICAL */
+ F(0xe7f0, VAVGL, VRR_c, V, 0, 0, 0, 0, vavgl, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 065ace6..3ff0682 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -1256,3 +1256,51 @@ static DisasJumpType op_vavg(DisasContext *s, DisasOps *o)
get_field(s->fields, v3), &g[es]);
return DISAS_NEXT;
}
+
+static void gen_avgl_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
+{
+ TCGv_i64 t0 = tcg_temp_new_i64();
+ TCGv_i64 t1 = tcg_temp_new_i64();
+
+ tcg_gen_extu_i32_i64(t0, a);
+ tcg_gen_extu_i32_i64(t1, b);
+ tcg_gen_add_i64(t0, t0, t1);
+ tcg_gen_addi_i64(t0, t0, 1);
+ tcg_gen_shri_i64(t0, t0, 1);
+ tcg_gen_extrl_i64_i32(d, t0);
+
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
+static void gen_avgl_i64(TCGv_i64 dl, TCGv_i64 al, TCGv_i64 bl)
+{
+ TCGv_i64 dh = tcg_temp_new_i64();
+ TCGv_i64 zero = tcg_const_i64(0);
+
+ tcg_gen_add2_i64(dl, dh, al, zero, bl, zero);
+ gen_addi2_i64(dl, dh, dl, dh, 1);
+ tcg_gen_extract2_i64(dl, dl, dh, 1);
+
+ tcg_temp_free_i64(dh);
+ tcg_temp_free_i64(zero);
+}
+
+static DisasJumpType op_vavgl(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m4);
+ static const GVecGen3 g[4] = {
+ { .fno = gen_helper_gvec_vavgl8, },
+ { .fno = gen_helper_gvec_vavgl16, },
+ { .fni4 = gen_avgl_i32, },
+ { .fni8 = gen_avgl_i64, },
+ };
+
+ if (es > ES_64) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+ gen_gvec_3(get_field(s->fields, v1), get_field(s->fields, v2),
+ get_field(s->fields, v3), &g[es]);
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c
index d964655..8f97d3f 100644
--- a/target/s390x/vec_int_helper.c
+++ b/target/s390x/vec_int_helper.c
@@ -30,3 +30,19 @@ void HELPER(gvec_vavg##BITS)(void *v1, const void *v2, const void *v3, \
}
DEF_VAVG(8)
DEF_VAVG(16)
+
+#define DEF_VAVGL(BITS) \
+void HELPER(gvec_vavgl##BITS)(void *v1, const void *v2, const void *v3, \
+ uint32_t desc) \
+{ \
+ int i; \
+ \
+ for (i = 0; i < (128 / BITS); i++) { \
+ const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
+ const uint##BITS##_t b = s390_vec_read_element##BITS(v3, i); \
+ \
+ s390_vec_write_element##BITS(v1, i, (a + b + 1) >> 1); \
+ } \
+}
+DEF_VAVGL(8)
+DEF_VAVGL(16)