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author | Lucien Murray-Pitts <lucienmp.qemu@gmail.com> | 2021-02-01 01:01:52 +0100 |
---|---|---|
committer | Laurent Vivier <laurent@vivier.eu> | 2021-02-11 21:10:01 +0100 |
commit | 7525a9b94c0c5733b8450c9451ca1de334f71ed8 (patch) | |
tree | da772c2697bc26e425178014a12286b70a1739c8 /target | |
parent | 8df0e6aedad33c6746f4bc2a4d0cfdd432877084 (diff) | |
download | qemu-7525a9b94c0c5733b8450c9451ca1de334f71ed8.zip qemu-7525a9b94c0c5733b8450c9451ca1de334f71ed8.tar.gz qemu-7525a9b94c0c5733b8450c9451ca1de334f71ed8.tar.bz2 |
m68k: add MSP detection support for stack pointer swap helpers
On m68k there are two varities of stack pointers: USP with SSP or ISP/MSP.
Only the 68020/30/40 support the MSP register the stack swap helpers don't
support this feature.
This patch adds this support, as well as comments to CPUM68KState to
make it clear how stacks are handled
Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <c61ad2d8b39f3b03b431819b6bf602a1c332b921.1612137712.git.balaton@eik.bme.hu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target')
-rw-r--r-- | target/m68k/cpu.c | 1 | ||||
-rw-r--r-- | target/m68k/cpu.h | 9 | ||||
-rw-r--r-- | target/m68k/helper.c | 3 |
3 files changed, 11 insertions, 2 deletions
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index ff3c4c1..37d2ed9 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -160,6 +160,7 @@ static void m68020_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_FPU); m68k_set_feature(env, M68K_FEATURE_CAS); m68k_set_feature(env, M68K_FEATURE_CHK2); + m68k_set_feature(env, M68K_FEATURE_MSP); } /* diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 5d2cb01..7c3feea 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -85,7 +85,13 @@ typedef struct CPUM68KState { uint32_t pc; uint32_t sr; - /* SSP and USP. The current_sp is stored in aregs[7], the other here. */ + /* + * The 68020/30/40 support two supervisor stacks, ISP and MSP. + * The 68000/10, Coldfire, and CPU32 only have USP/SSP. + * + * The current_sp is stored in aregs[7], the other here. + * The USP, SSP, and if used the additional ISP for 68020/30/40. + */ int current_sp; uint32_t sp[3]; @@ -484,6 +490,7 @@ enum m68k_features { M68K_FEATURE_CF_EMAC, M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */ M68K_FEATURE_USP, /* User Stack Pointer. (680[012346]0, ISA A+, B or C).*/ + M68K_FEATURE_MSP, /* Master Stack Pointer. (680[234]0) */ M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */ M68K_FEATURE_WORD_INDEX, /* word sized address index registers. */ M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */ diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 1efd6e4..4185ca9 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -463,7 +463,8 @@ void m68k_switch_sp(CPUM68KState *env) env->sp[env->current_sp] = env->aregs[7]; if (m68k_feature(env, M68K_FEATURE_M68000)) { if (env->sr & SR_S) { - if (env->sr & SR_M) { + /* SR:Master-Mode bit unimplemented then ISP is not available */ + if (!m68k_feature(env, M68K_FEATURE_MSP) || env->sr & SR_M) { new_sp = M68K_SSP; } else { new_sp = M68K_ISP; |