diff options
author | David Hildenbrand <david@redhat.com> | 2019-04-11 09:50:42 +0200 |
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committer | David Hildenbrand <david@redhat.com> | 2019-05-17 10:54:13 +0200 |
commit | 751a564f79b6a1f1fd7a7866af3a0af6468d9c4f (patch) | |
tree | 578dcbfd2524839854602b222055107214674f0d /target | |
parent | b0160ec99ae886d1e4961fc5dbf70bf8becfb339 (diff) | |
download | qemu-751a564f79b6a1f1fd7a7866af3a0af6468d9c4f.zip qemu-751a564f79b6a1f1fd7a7866af3a0af6468d9c4f.tar.gz qemu-751a564f79b6a1f1fd7a7866af3a0af6468d9c4f.tar.bz2 |
s390x/tcg: Implement VECTOR ELEMENT COMPARE *
Fairly easy to implement, we can make use of the existing CC helpers
cmps64 and cmpu64 - we siply have to sign extend the elements.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/s390x/insn-data.def | 4 | ||||
-rw-r--r-- | target/s390x/translate_vx.inc.c | 20 |
2 files changed, 24 insertions, 0 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 6445946..52e398f 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1074,6 +1074,10 @@ F(0xe7f0, VAVGL, VRR_c, V, 0, 0, 0, 0, vavgl, 0, IF_VEC) /* VECTOR CHECKSUM */ F(0xe766, VCKSM, VRR_c, V, 0, 0, 0, 0, vcksm, 0, IF_VEC) +/* VECTOR ELEMENT COMPARE */ + F(0xe7db, VEC, VRR_a, V, 0, 0, 0, 0, vec, cmps64, IF_VEC) +/* VECTOR ELEMENT COMPARE LOGICAL */ + F(0xe7d9, VECL, VRR_a, V, 0, 0, 0, 0, vec, cmpu64, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index b9d40ff..4d5af6e 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -1369,3 +1369,23 @@ static DisasJumpType op_vcksm(DisasContext *s, DisasOps *o) tcg_temp_free_i32(sum); return DISAS_NEXT; } + +static DisasJumpType op_vec(DisasContext *s, DisasOps *o) +{ + uint8_t es = get_field(s->fields, m3); + const uint8_t enr = NUM_VEC_ELEMENTS(es) / 2 - 1; + + if (es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + if (s->fields->op2 == 0xdb) { + es |= MO_SIGN; + } + + o->in1 = tcg_temp_new_i64(); + o->in2 = tcg_temp_new_i64(); + read_vec_element_i64(o->in1, get_field(s->fields, v1), enr, es); + read_vec_element_i64(o->in2, get_field(s->fields, v2), enr, es); + return DISAS_NEXT; +} |