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author | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 16:32:17 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-02 07:00:52 -0400 |
commit | 70863887a84caae2cfaf31b3ce900452d87553bd (patch) | |
tree | eec5bbc9a5a0dae7c605b3bdd74bd69e2495ed2d /target | |
parent | 5753605412c194a0368b892d540b9971cd3a1907 (diff) | |
download | qemu-70863887a84caae2cfaf31b3ce900452d87553bd.zip qemu-70863887a84caae2cfaf31b3ce900452d87553bd.tar.gz qemu-70863887a84caae2cfaf31b3ce900452d87553bd.tar.bz2 |
target/hexagon: Remove hexagon_cpu_tlb_fill
The fallback code in cpu_loop_exit_sigsegv is sufficient
for hexagon linux-user.
Remove the code from cpu_loop that raises SIGSEGV.
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/hexagon/cpu.c | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 3338365..160a46a 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -245,34 +245,11 @@ static void hexagon_cpu_init(Object *obj) qdev_property_add_static(DEVICE(obj), &hexagon_lldb_stack_adjust_property); } -static bool hexagon_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ -#ifdef CONFIG_USER_ONLY - switch (access_type) { - case MMU_INST_FETCH: - cs->exception_index = HEX_EXCP_FETCH_NO_UPAGE; - break; - case MMU_DATA_LOAD: - cs->exception_index = HEX_EXCP_PRIV_NO_UREAD; - break; - case MMU_DATA_STORE: - cs->exception_index = HEX_EXCP_PRIV_NO_UWRITE; - break; - } - cpu_loop_exit_restore(cs, retaddr); -#else -#error System mode not implemented for Hexagon -#endif -} - #include "hw/core/tcg-cpu-ops.h" static const struct TCGCPUOps hexagon_tcg_ops = { .initialize = hexagon_translate_init, .synchronize_from_tb = hexagon_cpu_synchronize_from_tb, - .tlb_fill = hexagon_tlb_fill, }; static void hexagon_cpu_class_init(ObjectClass *c, void *data) |