diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-05-27 11:18:53 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-30 17:05:11 +0100 |
| commit | 6f5cd67008ec3fc3e270ac41bbd80f3b510613a5 (patch) | |
| tree | 2a0a9ba8037e5439eb4142bb57d44c171252323c /target | |
| parent | 7de2617b7ae54536f291dc8df1b5a50863badae0 (diff) | |
| download | qemu-6f5cd67008ec3fc3e270ac41bbd80f3b510613a5.zip qemu-6f5cd67008ec3fc3e270ac41bbd80f3b510613a5.tar.gz qemu-6f5cd67008ec3fc3e270ac41bbd80f3b510613a5.tar.bz2 | |
target/arm: Use TRANS_FEAT for FCADD
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-101-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate-sve.c | 30 |
1 files changed, 7 insertions, 23 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 1108494..e323b2d 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -3966,29 +3966,13 @@ DO_FPCMP(FACGT, facgt) #undef DO_FPCMP -static bool trans_FCADD(DisasContext *s, arg_FCADD *a) -{ - static gen_helper_gvec_4_ptr * const fns[3] = { - gen_helper_sve_fcadd_h, - gen_helper_sve_fcadd_s, - gen_helper_sve_fcadd_d - }; - - if (a->esz == 0) { - return false; - } - if (sve_access_check(s)) { - unsigned vsz = vec_full_reg_size(s); - TCGv_ptr status = fpstatus_ptr(a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR); - tcg_gen_gvec_4_ptr(vec_full_reg_offset(s, a->rd), - vec_full_reg_offset(s, a->rn), - vec_full_reg_offset(s, a->rm), - pred_full_reg_offset(s, a->pg), - status, vsz, vsz, a->rot, fns[a->esz - 1]); - tcg_temp_free_ptr(status); - } - return true; -} +static gen_helper_gvec_4_ptr * const fcadd_fns[] = { + NULL, gen_helper_sve_fcadd_h, + gen_helper_sve_fcadd_s, gen_helper_sve_fcadd_d, +}; +TRANS_FEAT(FCADD, aa64_sve, gen_gvec_fpst_zzzp, fcadd_fns[a->esz], + a->rd, a->rn, a->rm, a->pg, a->rot, + a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR) static bool do_fmla(DisasContext *s, arg_rprrr_esz *a, gen_helper_gvec_5_ptr *fn) |