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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-10-03 16:17:10 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2021-10-21 11:42:47 +1100
commit6f4912a4160f157217730b0affdcb6c92c24ca76 (patch)
tree164fdb76f4d1eeefca0f975c32b8cdeb8e1a0540 /target
parent621f70d21027a914eda1446134193a24e7a662d5 (diff)
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target/ppc: Use tcg_constant_i32() in gen_setb()
Avoid using TCG temporaries for the -1 and 8 constant values. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003141711.3673181-2-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/translate.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index c3c6cb9..0258c1b 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5068,19 +5068,15 @@ static void gen_mtspr(DisasContext *ctx)
static void gen_setb(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- TCGv_i32 t8 = tcg_temp_new_i32();
- TCGv_i32 tm1 = tcg_temp_new_i32();
+ TCGv_i32 t8 = tcg_constant_i32(8);
+ TCGv_i32 tm1 = tcg_constant_i32(-1);
int crf = crfS(ctx->opcode);
tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4);
- tcg_gen_movi_i32(t8, 8);
- tcg_gen_movi_i32(tm1, -1);
tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0);
tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
tcg_temp_free_i32(t0);
- tcg_temp_free_i32(t8);
- tcg_temp_free_i32(tm1);
}
#endif