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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-28 13:15:04 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-28 13:15:04 +0100 |
| commit | 66b5ad561552c5c77058502ea3c7f04316937b64 (patch) | |
| tree | 1868c59ef94ca0cfde9ada0e4b5f77c1fe2de5d8 /target | |
| parent | 8428cdb245099dcf03c32e1b66f530ada65a6e83 (diff) | |
| download | qemu-66b5ad561552c5c77058502ea3c7f04316937b64.zip qemu-66b5ad561552c5c77058502ea3c7f04316937b64.tar.gz qemu-66b5ad561552c5c77058502ea3c7f04316937b64.tar.bz2 | |
target/ppc: 405: Alignment exception cleanup
There is no DSISR in the 405. It uses DEAR which we already set
earlier at ppc_cpu_do_unaligned_access.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au
Message-Id: <20220118184448.852996-10-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/excp_helper.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 1f915f6..55f6b0e 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -474,13 +474,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_EXTERNAL: /* External input */ break; case POWERPC_EXCP_ALIGN: /* Alignment exception */ - /* Get rS/rD and rA from faulting opcode */ - /* - * Note: the opcode fields will not be set properly for a - * direct store load/store, but nobody cares as nobody - * actually uses direct store segments. - */ - env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16; break; case POWERPC_EXCP_PROGRAM: /* Program exception */ switch (env->error_code & ~0xF) { |