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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2023-02-22 15:51:57 -0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-03-01 13:47:09 -0800
commit5b17fefb90adcd79854858b2671106ad1035b391 (patch)
tree0e015322c52b2783c9552c7032ba0e04b1013f14 /target
parentd4ea71170432fef9e8394ab33eac3cdc3a9540d3 (diff)
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target/riscv: do not mask unsupported QEMU extensions in write_misa()
The masking done using env->misa_ext_mask already filters any extension that QEMU doesn't support. If the hart supports the extension then QEMU supports it as well. If the masking done by env->misa_ext_mask is somehow letting unsupported QEMU extensions pass by, misa_ext_mask itself needs to be fixed instead. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230222185205.355361-3-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/csr.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 1b0a0c1..e149b45 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1356,9 +1356,6 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
/* Mask extensions that are not supported by this hart */
val &= env->misa_ext_mask;
- /* Mask extensions that are not supported by QEMU */
- val &= (RVI | RVE | RVM | RVA | RVF | RVD | RVC | RVS | RVU | RVV);
-
/* 'D' depends on 'F', so clear 'D' if 'F' is not present */
if ((val & RVD) && !(val & RVF)) {
val &= ~RVD;