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authorMax Filippov <jcmvbkbc@gmail.com>2017-10-31 16:17:43 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2018-01-09 09:55:39 -0800
commit5a6539e627faf9251e1db78238b9f9b870610518 (patch)
treecf1d5f6c9ff660be906c294b9f44596c4b6c2320 /target
parentc5ac936e5e8356cf6bba8e39519a273ab0fc6fed (diff)
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target/xtensa: implement disassembler
Add disas/xtensa.c and use libisa for instruction decoding/opcode name lookup. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target')
-rw-r--r--target/xtensa/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 9196178..1c982a0 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -93,6 +93,14 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
return oc;
}
+static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+
+ info->private_data = cpu->env.config->isa;
+ info->print_insn = print_insn_xtensa;
+}
+
static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -164,6 +172,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
cc->do_unassigned_access = xtensa_cpu_do_unassigned_access;
#endif
cc->debug_excp_handler = xtensa_breakpoint_handler;
+ cc->disas_set_info = xtensa_cpu_disas_set_info;
cc->tcg_initialize = xtensa_translate_init;
dc->vmsd = &vmstate_xtensa_cpu;
}