aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2024-02-15 19:39:50 -0300
committerAlistair Francis <alistair.francis@wdc.com>2024-03-08 16:28:14 +1000
commit4f6473ad6853e6a1a2fa4ed35d6331cc16949ad5 (patch)
tree69690004e5b9ea6e97ee9d152c21652104b6cb52 /target
parenta3432cf227908f8169bfc45caa900ef29e757440 (diff)
downloadqemu-4f6473ad6853e6a1a2fa4ed35d6331cc16949ad5.zip
qemu-4f6473ad6853e6a1a2fa4ed35d6331cc16949ad5.tar.gz
qemu-4f6473ad6853e6a1a2fa4ed35d6331cc16949ad5.tar.bz2
target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile()
Recent changes in options handling removed the 'mmu' default the bare CPUs had, meaning that we must enable 'mmu' by hand when using the rva22s64 profile CPU. Given that this profile is setting a satp mode, it already implies that we need a 'mmu'. Enable the 'mmu' in this case. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240215223955.969568-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/tcg/tcg-cpu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index dd5228c..ee4c349 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -1075,6 +1075,7 @@ static void cpu_set_profile(Object *obj, Visitor *v, const char *name,
#ifndef CONFIG_USER_ONLY
if (profile->satp_mode != RISCV_PROFILE_ATTR_UNUSED) {
+ object_property_set_bool(obj, "mmu", true, NULL);
const char *satp_prop = satp_mode_str(profile->satp_mode,
riscv_cpu_is_32bit(cpu));
object_property_set_bool(obj, satp_prop, profile->enabled, NULL);