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| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2017-01-10 14:20:40 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-01-31 10:10:14 +1100 |
| commit | 46804e2875e24d03c563a6ba6c59ee009a07816a (patch) | |
| tree | 1fd0eeac868b6de54fd314ab4a6031b7cb9c82de /target | |
| parent | 08f1ee5a09a9afb912932d31b546a1faca4ddd35 (diff) | |
| download | qemu-46804e2875e24d03c563a6ba6c59ee009a07816a.zip qemu-46804e2875e24d03c563a6ba6c59ee009a07816a.tar.gz qemu-46804e2875e24d03c563a6ba6c59ee009a07816a.tar.bz2 | |
target-ppc: Add xvxexpdp instruction
xvxexpdp: VSX Vector Extract Exponent Dual Precision
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/translate/vsx-impl.inc.c | 17 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-ops.inc.c | 1 |
2 files changed, 18 insertions, 0 deletions
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 160a80c..7b26f75 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1413,6 +1413,23 @@ static void gen_xvxexpsp(DisasContext *ctx) tcg_gen_andi_i64(xtl, xtl, 0xFF000000FF); } +static void gen_xvxexpdp(DisasContext *ctx) +{ + TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); + TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); + TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + tcg_gen_shri_i64(xth, xbh, 52); + tcg_gen_andi_i64(xth, xth, 0x7FF); + tcg_gen_shri_i64(xtl, xbl, 52); + tcg_gen_andi_i64(xtl, xtl, 0x7FF); +} + #undef GEN_XX2FORM #undef GEN_XX3FORM #undef GEN_XX2IFORM diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-ops.inc.c index eb7334a..a3061ce 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -126,6 +126,7 @@ GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001), GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300), GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300), +GEN_XX2FORM_EO(xvxexpdp, 0x16, 0x1D, 0x00, PPC2_ISA300), GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300), GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX), |