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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:21 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:21 +0100 |
| commit | 2ccf0fef632f3d54b2cc9ea08f1e6904ff1f8df4 (patch) | |
| tree | 3366818d7868e62ba3b70588480959aab4a13e32 /target | |
| parent | a3f0ecfd4e98d22e1c24e7baa924d99250a5799f (diff) | |
| download | qemu-2ccf0fef632f3d54b2cc9ea08f1e6904ff1f8df4.zip qemu-2ccf0fef632f3d54b2cc9ea08f1e6904ff1f8df4.tar.gz qemu-2ccf0fef632f3d54b2cc9ea08f1e6904ff1f8df4.tar.bz2 | |
target/arm: Mask virtual interrupts if HCR_EL2.TGE is set
If the "trap general exceptions" bit HCR_EL2.TGE is set, we
must mask all virtual interrupts (as per DDI0487C.a D1.14.3).
Implement this in arm_excp_unmasked().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180724115950.17316-2-peter.maydell@linaro.org
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e310ffc..efb2a8d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2261,13 +2261,15 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, break; case EXCP_VFIQ: - if (secure || !(env->cp15.hcr_el2 & HCR_FMO)) { + if (secure || !(env->cp15.hcr_el2 & HCR_FMO) + || (env->cp15.hcr_el2 & HCR_TGE)) { /* VFIQs are only taken when hypervized and non-secure. */ return false; } return !(env->daif & PSTATE_F); case EXCP_VIRQ: - if (secure || !(env->cp15.hcr_el2 & HCR_IMO)) { + if (secure || !(env->cp15.hcr_el2 & HCR_IMO) + || (env->cp15.hcr_el2 & HCR_TGE)) { /* VIRQs are only taken when hypervized and non-secure. */ return false; } |