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author | Max Filippov <jcmvbkbc@gmail.com> | 2018-02-03 23:55:06 -0800 |
---|---|---|
committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-03-13 11:30:22 -0700 |
commit | 1b7b26e4748580dce3ec671ce7ed3d65a986cf9c (patch) | |
tree | a0864458473d081e4e7e57ea68ffd23c45599801 /target | |
parent | b9317a2a69ac78f79ee4965037c8eaa407ed0724 (diff) | |
download | qemu-1b7b26e4748580dce3ec671ce7ed3d65a986cf9c.zip qemu-1b7b26e4748580dce3ec671ce7ed3d65a986cf9c.tar.gz qemu-1b7b26e4748580dce3ec671ce7ed3d65a986cf9c.tar.bz2 |
target/xtensa: use correct number of registers in gdbstub
System emulation should provide access to all registers, userspace
emulation should only provide access to unprivileged registers.
Record register flags from GDB register map definition, calculate both
num_regs and num_core_regs if either is zero. Use num_regs in system
emulation, num_core_regs in userspace emulation gdbstub.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/xtensa/cpu.h | 1 | ||||
-rw-r--r-- | target/xtensa/gdbstub.c | 14 | ||||
-rw-r--r-- | target/xtensa/helper.c | 28 | ||||
-rw-r--r-- | target/xtensa/overlay_tool.h | 11 |
4 files changed, 41 insertions, 13 deletions
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 49c2e3c..255cc9e 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -310,6 +310,7 @@ typedef struct xtensa_tlb { typedef struct XtensaGdbReg { int targno; + unsigned flags; int type; int group; unsigned size; diff --git a/target/xtensa/gdbstub.c b/target/xtensa/gdbstub.c index d78a1b4..a8ea98d 100644 --- a/target/xtensa/gdbstub.c +++ b/target/xtensa/gdbstub.c @@ -28,9 +28,14 @@ int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) XtensaCPU *cpu = XTENSA_CPU(cs); CPUXtensaState *env = &cpu->env; const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; +#ifdef CONFIG_USER_ONLY + int num_regs = env->config->gdb_regmap.num_core_regs; +#else + int num_regs = env->config->gdb_regmap.num_regs; +#endif unsigned i; - if (n < 0 || n >= env->config->gdb_regmap.num_regs) { + if (n < 0 || n >= num_regs) { return 0; } @@ -81,8 +86,13 @@ int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) CPUXtensaState *env = &cpu->env; uint32_t tmp; const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; +#ifdef CONFIG_USER_ONLY + int num_regs = env->config->gdb_regmap.num_core_regs; +#else + int num_regs = env->config->gdb_regmap.num_regs; +#endif - if (n < 0 || n >= env->config->gdb_regmap.num_regs) { + if (n < 0 || n >= num_regs) { return 0; } diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 5009fec..3488503 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -88,19 +88,31 @@ static void init_libisa(XtensaConfig *config) void xtensa_finalize_config(XtensaConfig *config) { - unsigned i, n = 0; - if (config->isa_internal) { init_libisa(config); } - if (config->gdb_regmap.num_regs) { - return; - } - for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) { - n += (config->gdb_regmap.reg[i].type != 6); + if (config->gdb_regmap.num_regs == 0 || + config->gdb_regmap.num_core_regs == 0) { + unsigned i; + unsigned n_regs = 0; + unsigned n_core_regs = 0; + + for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) { + if (config->gdb_regmap.reg[i].type != 6) { + ++n_regs; + if ((config->gdb_regmap.reg[i].flags & 0x1) == 0) { + ++n_core_regs; + } + } + } + if (config->gdb_regmap.num_regs == 0) { + config->gdb_regmap.num_regs = n_regs; + } + if (config->gdb_regmap.num_core_regs == 0) { + config->gdb_regmap.num_core_regs = n_core_regs; + } } - config->gdb_regmap.num_regs = n; } void xtensa_register_core(XtensaConfigList *node) diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h index 589dd62..b24ad11 100644 --- a/target/xtensa/overlay_tool.h +++ b/target/xtensa/overlay_tool.h @@ -25,9 +25,14 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \ - a1, a2, a3, a4, a5, a6) \ - { .targno = (no), .type = (typ), .group = (grp), .size = (sz) }, +#define XTREG(idx, ofs, bi, sz, al, no, fl, cp, typ, grp, name, \ + a1, a2, a3, a4, a5, a6) { \ + .targno = (no), \ + .flags = (fl), \ + .type = (typ), \ + .group = (grp), \ + .size = (sz), \ +}, #define XTREG_END { .targno = -1 }, #ifndef XCHAL_HAVE_DEPBITS |