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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-28 13:15:06 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-28 13:15:06 +0100 |
| commit | 12e8042698a0682ff87909f513345b6d52c3de2e (patch) | |
| tree | aaf9e4818b3fd8aa8881e1f521a92d75516d7b88 /target | |
| parent | 3fbb46409f012aea9c1443ae4bd9f49d4fcabd75 (diff) | |
| download | qemu-12e8042698a0682ff87909f513345b6d52c3de2e.zip qemu-12e8042698a0682ff87909f513345b6d52c3de2e.tar.gz qemu-12e8042698a0682ff87909f513345b6d52c3de2e.tar.bz2 | |
target/ppc: 74xx: External interrupt cleanup
The 74xx don't have MSR_HV so all the LPES0 logic can be removed.
Also remove the BookE IRQ code.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220127201116.1154733-5-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/excp_helper.c | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 0d8c66b..b9a1d7a 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -555,7 +555,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; - int excp_model = env->excp_model; target_ulong msr, new_msr, vector; int srr0, srr1, lev = -1; @@ -625,44 +624,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) msr |= env->error_code; break; case POWERPC_EXCP_EXTERNAL: /* External input */ - { - bool lpes0; - - cs = CPU(cpu); - - /* - * Exception targeting modifiers - * - * LPES0 is supported on POWER7/8/9 - * LPES1 is not supported (old iSeries mode) - * - * On anything else, we behave as if LPES0 is 1 - * (externals don't alter MSR:HV) - */ -#if defined(TARGET_PPC64) - if (excp_model == POWERPC_EXCP_POWER7 || - excp_model == POWERPC_EXCP_POWER8 || - excp_model == POWERPC_EXCP_POWER9 || - excp_model == POWERPC_EXCP_POWER10) { - lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0); - } else -#endif /* defined(TARGET_PPC64) */ - { - lpes0 = true; - } - - if (!lpes0) { - new_msr |= (target_ulong)MSR_HVB; - new_msr |= env->msr & ((target_ulong)1 << MSR_RI); - srr0 = SPR_HSRR0; - srr1 = SPR_HSRR1; - } - if (env->mpic_proxy) { - /* IACK the IRQ on delivery */ - env->spr[SPR_BOOKE_EPR] = ldl_phys(cs->as, env->mpic_iack); - } break; - } case POWERPC_EXCP_ALIGN: /* Alignment exception */ /* Get rS/rD and rA from faulting opcode */ /* |