diff options
author | Julian Brown <julian@codesourcery.com> | 2016-12-27 14:59:23 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-12-27 14:59:23 +0000 |
commit | 0f1944735b6bac810b067e8a7a5154744536fd59 (patch) | |
tree | 152248d122482ddbd9cb90a708f2155915e87d60 /target | |
parent | 2494c9f6405a1979319f12d1bb4e9a6eb28a529d (diff) | |
download | qemu-0f1944735b6bac810b067e8a7a5154744536fd59.zip qemu-0f1944735b6bac810b067e8a7a5154744536fd59.tar.gz qemu-0f1944735b6bac810b067e8a7a5154744536fd59.tar.bz2 |
Correct value of ARM Cortex-A8 MVFR1 register.
The value of the MVFR1 (Media and VFP Feature Register 1) register for
the Cortex-A8 appears to be incorrect (according to the TRM, DDI0344K),
with the "full denormal arithmetic" and "propagation of NaN" fields
holding both 0 instead of both 1.
I had a go tracing the history of the use of this value, and it seems
it's always just been wrong in QEMU: maybe it was derived from early
documentation, or guessed based on the use of a "VFP Lite" implementation
in the Cortex-A8.
Depending on the startup/early-boot code in use, this can manifest as
failure to perform denormal arithmetic properly: in our case, selecting
a Cortex-A8 CPU when using QEMU as an instruction-set simulator for
bare-metal GCC testing caused tests using denormal arithmetic to
fail. Problems might be masked (or not occur) when using a full OS kernel
with suitable trap handlers (I'm not sure).
Signed-off-by: Julian Brown <julian@codesourcery.com>
Message-id: 1481130858-31767-1-git-send-email-julian@codesourcery.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 99f0dbe..98e2c68 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1055,7 +1055,7 @@ static void cortex_a8_initfn(Object *obj) cpu->midr = 0x410fc080; cpu->reset_fpsid = 0x410330c0; cpu->mvfr0 = 0x11110222; - cpu->mvfr1 = 0x00011100; + cpu->mvfr1 = 0x00011111; cpu->ctr = 0x82048004; cpu->reset_sctlr = 0x00c50078; cpu->id_pfr0 = 0x1031; |