diff options
| author | Deepak Gupta <debug@rivosinc.com> | 2024-10-08 15:50:04 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-30 11:22:08 +1000 |
| commit | 98f21c30f5beffc45232721ae79c019df58ae9f1 (patch) | |
| tree | ee399f300ec737fbb37a7f5abf717a61209a4810 /target/riscv/translate.c | |
| parent | 669b4867495c48cfb302c6500de99f79d38802b6 (diff) | |
| download | qemu-98f21c30f5beffc45232721ae79c019df58ae9f1.zip qemu-98f21c30f5beffc45232721ae79c019df58ae9f1.tar.gz qemu-98f21c30f5beffc45232721ae79c019df58ae9f1.tar.bz2 | |
target/riscv: AMO operations always raise store/AMO fault
This patch adds one more word for tcg compile which can be obtained during
unwind time to determine fault type for original operation (example AMO).
Depending on that, fault can be promoted to store/AMO fault.
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241008225010.1861630-15-debug@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/translate.c')
| -rw-r--r-- | target/riscv/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index afa2ed4..0322597 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1264,7 +1264,7 @@ static void riscv_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) pc_next &= ~TARGET_PAGE_MASK; } - tcg_gen_insn_start(pc_next, 0); + tcg_gen_insn_start(pc_next, 0, 0); ctx->insn_start_updated = false; } |