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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-04-01 10:11:50 +0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-05-24 12:09:22 -0700 |
| commit | e1d455dd91c935c714412dafeb24db947429a929 (patch) | |
| tree | e0cae8303529a3f6b85542a2f183a3db2c5e0c7d /target/riscv/cpu.c | |
| parent | 81770255581bd210c57b86a6e808628ab8d0c543 (diff) | |
| download | qemu-e1d455dd91c935c714412dafeb24db947429a929.zip qemu-e1d455dd91c935c714412dafeb24db947429a929.tar.gz qemu-e1d455dd91c935c714412dafeb24db947429a929.tar.bz2 | |
target/riscv: Merge argument sets for insn32 and insn16
In some cases this allows us to directly use the insn32
translator function. In some cases we still need a shim.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv/cpu.c')
0 files changed, 0 insertions, 0 deletions