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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-05-22 16:23:21 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-05-24 09:34:40 +1000 |
| commit | c9d5aedf40cfa0d68a6a4c020d14f8e6116a369e (patch) | |
| tree | 7b3e45f92c97f4585ea355265b014287ccdfb4d7 /target/ppc | |
| parent | 4d2b0ad32a593ac24757b66f64efe2fb84161345 (diff) | |
| download | qemu-c9d5aedf40cfa0d68a6a4c020d14f8e6116a369e.zip qemu-c9d5aedf40cfa0d68a6a4c020d14f8e6116a369e.tar.gz qemu-c9d5aedf40cfa0d68a6a4c020d14f8e6116a369e.tar.bz2 | |
target/ppc: Implement LDBAR, TTR SPRs
LDBAR, TTR are a Power-specific SPRs. These simple implementations
are enough for IBM proprietary firmware for now.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/cpu.h | 2 | ||||
| -rw-r--r-- | target/ppc/cpu_init.c | 10 |
2 files changed, 12 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 141cbef..823be85 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2098,6 +2098,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_DEXCR (0x33C) #define SPR_IC (0x350) #define SPR_VTB (0x351) +#define SPR_LDBAR (0x352) #define SPR_MMCRC (0x353) #define SPR_PSSCR (0x357) #define SPR_440_INV0 (0x370) @@ -2144,6 +2145,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_440_IVLIM (0x399) #define SPR_TSCR (0x399) #define SPR_750_DMAU (0x39A) +#define SPR_POWER_TTR (0x39A) #define SPR_750_DMAL (0x39B) #define SPR_440_RSTCFG (0x39B) #define SPR_BOOKE_DCDBTRL (0x39C) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 415cc7a..d181adc 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5767,6 +5767,16 @@ static void register_power_common_book4_sprs(CPUPPCState *env) &spr_access_nop, &spr_write_generic, &spr_access_nop, &spr_write_generic, 0x00000000); + spr_register_hv(env, SPR_LDBAR, "LDBAR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_core_lpar_write_generic, + 0x00000000); + spr_register_hv(env, SPR_POWER_TTR, "TTR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_core_write_generic, + 0x00000000); #endif } |