diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2023-07-12 23:02:00 +1000 |
---|---|---|
committer | Nicholas Piggin <npiggin@gmail.com> | 2024-05-24 09:34:40 +1000 |
commit | 4d2b0ad32a593ac24757b66f64efe2fb84161345 (patch) | |
tree | 7071a7d7e0d45086deb59e72943fcfc25a85621c /target/ppc | |
parent | e5c2ac9dc1da8cfb7830a44cb4dcb94ba983c1ad (diff) | |
download | qemu-4d2b0ad32a593ac24757b66f64efe2fb84161345.zip qemu-4d2b0ad32a593ac24757b66f64efe2fb84161345.tar.gz qemu-4d2b0ad32a593ac24757b66f64efe2fb84161345.tar.bz2 |
target/ppc: Add SMT support to PTCR SPR
PTCR is a per-core register.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
-rw-r--r-- | target/ppc/misc_helper.c | 16 | ||||
-rw-r--r-- | target/ppc/translate.c | 4 |
2 files changed, 18 insertions, 2 deletions
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 6f419c9..a67930d 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -173,6 +173,7 @@ void helper_store_sdr1(CPUPPCState *env, target_ulong val) void helper_store_ptcr(CPUPPCState *env, target_ulong val) { if (env->spr[SPR_PTCR] != val) { + CPUState *cs = env_cpu(env); PowerPCCPU *cpu = env_archcpu(env); target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS; target_ulong patbsize = val & PTCR_PATS; @@ -194,8 +195,19 @@ void helper_store_ptcr(CPUPPCState *env, target_ulong val) return; } - env->spr[SPR_PTCR] = val; - tlb_flush(env_cpu(env)); + if (cs->nr_threads == 1 || !(env->flags & POWERPC_FLAG_SMT_1LPAR)) { + env->spr[SPR_PTCR] = val; + tlb_flush(cs); + } else { + CPUState *ccs; + + THREAD_SIBLING_FOREACH(cs, ccs) { + PowerPCCPU *ccpu = POWERPC_CPU(ccs); + CPUPPCState *cenv = &ccpu->env; + cenv->spr[SPR_PTCR] = val; + tlb_flush(ccs); + } + } } } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 7b52502..64131bf 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -909,6 +909,10 @@ void spr_write_hior(DisasContext *ctx, int sprn, int gprn) } void spr_write_ptcr(DisasContext *ctx, int sprn, int gprn) { + if (!gen_serialize_core(ctx)) { + return; + } + gen_helper_store_ptcr(tcg_env, cpu_gpr[gprn]); } |