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| author | Paolo Bonzini <pbonzini@redhat.com> | 2020-01-20 19:21:43 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-01-24 20:59:09 +0100 |
| commit | 4e45aff398cd1542c2a384a2a3b8600f23337d86 (patch) | |
| tree | 1f17078d6deb971b2bfea955985a1cc39d1a2bc9 /target/i386/cpu.h | |
| parent | 420ae1fc51c99abfd03b1c590f55617edd2a2bed (diff) | |
| download | qemu-4e45aff398cd1542c2a384a2a3b8600f23337d86.zip qemu-4e45aff398cd1542c2a384a2a3b8600f23337d86.tar.gz qemu-4e45aff398cd1542c2a384a2a3b8600f23337d86.tar.bz2 | |
target/i386: add a ucode-rev property
Add the property and plumb it in TCG and HVF (the latter of which
tried to support returning a constant value but used the wrong MSR).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <1579544504-3616-3-git-send-email-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e6de38a..576f309 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -348,6 +348,7 @@ typedef enum X86Seg { #define MSR_IA32_SPEC_CTRL 0x48 #define MSR_VIRT_SSBD 0xc001011f #define MSR_IA32_PRED_CMD 0x49 +#define MSR_IA32_UCODE_REV 0x8b #define MSR_IA32_CORE_CAPABILITY 0xcf #define MSR_IA32_ARCH_CAPABILITIES 0x10a @@ -1627,6 +1628,8 @@ struct X86CPU { CPUNegativeOffsetState neg; CPUX86State env; + uint64_t ucode_rev; + uint32_t hyperv_spinlock_attempts; char *hyperv_vendor_id; bool hyperv_synic_kvm_only; |