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authorPeter Maydell <peter.maydell@linaro.org>2021-09-13 10:54:35 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-09-21 16:28:27 +0100
commitf8d94803f1d82fa9268053abd16f984bc535b3cd (patch)
tree90350b69a1bd7aa75376cb03d14a2bf0bb0e1d58 /target/arm
parent4b1561c4720bff2b438f53a73349aca118d6a519 (diff)
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target/arm: Optimize MVE VDUP
Optimize the MVE VDUP insns by using TCG vector ops when possible. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210913095440.13462-8-peter.maydell@linaro.org
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/translate-mve.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index d30c7e5..13de552 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -500,11 +500,15 @@ static bool trans_VDUP(DisasContext *s, arg_VDUP *a)
return true;
}
- qd = mve_qreg_ptr(a->qd);
rt = load_reg(s, a->rt);
- tcg_gen_dup_i32(a->size, rt, rt);
- gen_helper_mve_vdup(cpu_env, qd, rt);
- tcg_temp_free_ptr(qd);
+ if (mve_no_predication(s)) {
+ tcg_gen_gvec_dup_i32(a->size, mve_qreg_offset(a->qd), 16, 16, rt);
+ } else {
+ qd = mve_qreg_ptr(a->qd);
+ tcg_gen_dup_i32(a->size, rt, rt);
+ gen_helper_mve_vdup(cpu_env, qd, rt);
+ tcg_temp_free_ptr(qd);
+ }
tcg_temp_free_i32(rt);
mve_update_eci(s);
return true;