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| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-17 01:01:56 +0200 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-07-19 14:45:15 -0700 |
| commit | 68cedf733ae32363ccf54f0b52c8a424d5ec98ed (patch) | |
| tree | 6314de330f862de43140430cc56edcde5d7c5240 /target/arm | |
| parent | abb1066df313602ef0ca631126bd342d399d5359 (diff) | |
| download | qemu-68cedf733ae32363ccf54f0b52c8a424d5ec98ed.zip qemu-68cedf733ae32363ccf54f0b52c8a424d5ec98ed.tar.gz qemu-68cedf733ae32363ccf54f0b52c8a424d5ec98ed.tar.bz2 | |
target/arm: optimize aarch32 rev16
Use the same mask to avoid having to load two different constants, as
suggested by Richard Henderson.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170516230159.4195-2-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index e27736c..d3003ae 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -343,11 +343,13 @@ static void gen_smul_dual(TCGv_i32 a, TCGv_i32 b) static void gen_rev16(TCGv_i32 var) { TCGv_i32 tmp = tcg_temp_new_i32(); + TCGv_i32 mask = tcg_const_i32(0x00ff00ff); tcg_gen_shri_i32(tmp, var, 8); - tcg_gen_andi_i32(tmp, tmp, 0x00ff00ff); + tcg_gen_and_i32(tmp, tmp, mask); + tcg_gen_and_i32(var, var, mask); tcg_gen_shli_i32(var, var, 8); - tcg_gen_andi_i32(var, var, 0xff00ff00); tcg_gen_or_i32(var, var, tmp); + tcg_temp_free_i32(mask); tcg_temp_free_i32(tmp); } |