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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-07 21:00:51 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-07 21:00:51 +0000 |
commit | e755699dc7d198c7ac31a73c9b8f45595129f44f (patch) | |
tree | f0c298ffc98668aa67ba1b300009ffe2f565fdb7 /target-ppc | |
parent | cec79b3bd98aaa92aa2b092524bcfc13d4a7851c (diff) | |
download | qemu-e755699dc7d198c7ac31a73c9b8f45595129f44f.zip qemu-e755699dc7d198c7ac31a73c9b8f45595129f44f.tar.gz qemu-e755699dc7d198c7ac31a73c9b8f45595129f44f.tar.bz2 |
Always enable precise emulation when softfloat is used
The patch below changes the way to enable softfloat on the PPC target. It
is now enabled when softfloat is used. The rationale behind this change
is that persons who want precise emulation prefer precision over emulation
speed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4168 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/exec.h | 4 | ||||
-rw-r--r-- | target-ppc/op.c | 14 | ||||
-rw-r--r-- | target-ppc/op_helper.c | 22 | ||||
-rw-r--r-- | target-ppc/op_helper.h | 6 |
4 files changed, 21 insertions, 25 deletions
diff --git a/target-ppc/exec.h b/target-ppc/exec.h index 76fdb0b..f14f6a8 100644 --- a/target-ppc/exec.h +++ b/target-ppc/exec.h @@ -27,10 +27,6 @@ #include "cpu.h" #include "exec-all.h" -/* For normal operations, precise emulation should not be needed */ -//#define USE_PRECISE_EMULATION 1 -#define USE_PRECISE_EMULATION 0 - register struct CPUPPCState *env asm(AREG0); #if TARGET_LONG_BITS > HOST_LONG_BITS /* no registers can be used */ diff --git a/target-ppc/op.c b/target-ppc/op.c index 972b8bc..f60a6a9 100644 --- a/target-ppc/op.c +++ b/target-ppc/op.c @@ -1716,7 +1716,7 @@ void OPPROTO op_srli_T1_64 (void) /* fadd - fadd. */ void OPPROTO op_fadd (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fadd(); #else FT0 = float64_add(FT0, FT1, &env->fp_status); @@ -1727,7 +1727,7 @@ void OPPROTO op_fadd (void) /* fsub - fsub. */ void OPPROTO op_fsub (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fsub(); #else FT0 = float64_sub(FT0, FT1, &env->fp_status); @@ -1738,7 +1738,7 @@ void OPPROTO op_fsub (void) /* fmul - fmul. */ void OPPROTO op_fmul (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fmul(); #else FT0 = float64_mul(FT0, FT1, &env->fp_status); @@ -1749,7 +1749,7 @@ void OPPROTO op_fmul (void) /* fdiv - fdiv. */ void OPPROTO op_fdiv (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fdiv(); #else FT0 = float64_div(FT0, FT1, &env->fp_status); @@ -1796,7 +1796,7 @@ void OPPROTO op_fsel (void) /* fmadd - fmadd. */ void OPPROTO op_fmadd (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fmadd(); #else FT0 = float64_mul(FT0, FT1, &env->fp_status); @@ -1808,7 +1808,7 @@ void OPPROTO op_fmadd (void) /* fmsub - fmsub. */ void OPPROTO op_fmsub (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_fmsub(); #else FT0 = float64_mul(FT0, FT1, &env->fp_status); @@ -1835,7 +1835,7 @@ void OPPROTO op_fnmsub (void) /* frsp - frsp. */ void OPPROTO op_frsp (void) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT do_frsp(); #else FT0 = float64_to_float32(FT0, &env->fp_status); diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 544d906..919b481 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -922,7 +922,7 @@ void do_float_check_status (void) } #endif -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_fadd (void) { if (unlikely(float64_is_signaling_nan(FT0) || @@ -989,7 +989,7 @@ void do_fdiv (void) FT0 = float64_div(FT0, FT1, &env->fp_status); } } -#endif /* USE_PRECISE_EMULATION */ +#endif /* CONFIG_SOFTFLOAT */ void do_fctiw (void) { @@ -1003,7 +1003,7 @@ void do_fctiw (void) fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { p.ll = float64_to_int32(FT0, &env->fp_status); -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT /* XXX: higher bits are not supposed to be significant. * to make tests easier, return the same as a real PowerPC 750 */ @@ -1025,7 +1025,7 @@ void do_fctiwz (void) fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status); -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT /* XXX: higher bits are not supposed to be significant. * to make tests easier, return the same as a real PowerPC 750 */ @@ -1114,7 +1114,7 @@ void do_frim (void) do_fri(float_round_down); } -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_fmadd (void) { if (unlikely(float64_is_signaling_nan(FT0) || @@ -1164,7 +1164,7 @@ void do_fmsub (void) #endif } } -#endif /* USE_PRECISE_EMULATION */ +#endif /* CONFIG_SOFTFLOAT */ void do_fnmadd (void) { @@ -1174,7 +1174,7 @@ void do_fnmadd (void) /* sNaN operation */ fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); } else { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT #ifdef FLOAT128 /* This is the way the PowerPC specification defines it */ float128 ft0_128, ft1_128; @@ -1206,7 +1206,7 @@ void do_fnmsub (void) /* sNaN operation */ fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); } else { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT #ifdef FLOAT128 /* This is the way the PowerPC specification defines it */ float128 ft0_128, ft1_128; @@ -1230,7 +1230,7 @@ void do_fnmsub (void) } } -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_frsp (void) { if (unlikely(float64_is_signaling_nan(FT0))) { @@ -1240,7 +1240,7 @@ void do_frsp (void) FT0 = float64_to_float32(FT0, &env->fp_status); } } -#endif /* USE_PRECISE_EMULATION */ +#endif /* CONFIG_SOFTFLOAT */ void do_fsqrt (void) { @@ -1295,7 +1295,7 @@ void do_fres (void) /* Zero reciprocal */ float_zero_divide_excp(); } else if (likely(isnormal(FT0))) { -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT FT0 = float64_div(1.0, FT0, &env->fp_status); FT0 = float64_to_float32(FT0, &env->fp_status); #else diff --git a/target-ppc/op_helper.h b/target-ppc/op_helper.h index 1d5fc0a..0510f0a 100644 --- a/target-ppc/op_helper.h +++ b/target-ppc/op_helper.h @@ -98,7 +98,7 @@ void do_compute_fprf (int set_class); #ifdef CONFIG_SOFTFLOAT void do_float_check_status (void); #endif -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_fadd (void); void do_fsub (void); void do_fmul (void); @@ -109,13 +109,13 @@ void do_fre (void); void do_fres (void); void do_frsqrte (void); void do_fsel (void); -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_fmadd (void); void do_fmsub (void); #endif void do_fnmadd (void); void do_fnmsub (void); -#if USE_PRECISE_EMULATION +#ifdef CONFIG_SOFTFLOAT void do_frsp (void); #endif void do_fctiw (void); |