aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/op_helper.c
diff options
context:
space:
mode:
Diffstat (limited to 'target-ppc/op_helper.c')
-rw-r--r--target-ppc/op_helper.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 544d906..919b481 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -922,7 +922,7 @@ void do_float_check_status (void)
}
#endif
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_fadd (void)
{
if (unlikely(float64_is_signaling_nan(FT0) ||
@@ -989,7 +989,7 @@ void do_fdiv (void)
FT0 = float64_div(FT0, FT1, &env->fp_status);
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fctiw (void)
{
@@ -1003,7 +1003,7 @@ void do_fctiw (void)
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else {
p.ll = float64_to_int32(FT0, &env->fp_status);
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
/* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750
*/
@@ -1025,7 +1025,7 @@ void do_fctiwz (void)
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else {
p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status);
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
/* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750
*/
@@ -1114,7 +1114,7 @@ void do_frim (void)
do_fri(float_round_down);
}
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_fmadd (void)
{
if (unlikely(float64_is_signaling_nan(FT0) ||
@@ -1164,7 +1164,7 @@ void do_fmsub (void)
#endif
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fnmadd (void)
{
@@ -1174,7 +1174,7 @@ void do_fnmadd (void)
/* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
#ifdef FLOAT128
/* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128;
@@ -1206,7 +1206,7 @@ void do_fnmsub (void)
/* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
#ifdef FLOAT128
/* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128;
@@ -1230,7 +1230,7 @@ void do_fnmsub (void)
}
}
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
void do_frsp (void)
{
if (unlikely(float64_is_signaling_nan(FT0))) {
@@ -1240,7 +1240,7 @@ void do_frsp (void)
FT0 = float64_to_float32(FT0, &env->fp_status);
}
}
-#endif /* USE_PRECISE_EMULATION */
+#endif /* CONFIG_SOFTFLOAT */
void do_fsqrt (void)
{
@@ -1295,7 +1295,7 @@ void do_fres (void)
/* Zero reciprocal */
float_zero_divide_excp();
} else if (likely(isnormal(FT0))) {
-#if USE_PRECISE_EMULATION
+#ifdef CONFIG_SOFTFLOAT
FT0 = float64_div(1.0, FT0, &env->fp_status);
FT0 = float64_to_float32(FT0, &env->fp_status);
#else