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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-10-19 14:22:32 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-11-02 14:32:32 +0100 |
| commit | c79db8c239fb4272de3cd0741c0ecfd549d5588a (patch) | |
| tree | 7a3ed0a556c3a56a696abd5705251f231a54fb70 /stubs/cpu-synchronize-state.c | |
| parent | f18708a53adc0549526fbeba5d1e892c0c4bf49c (diff) | |
| download | qemu-c79db8c239fb4272de3cd0741c0ecfd549d5588a.zip qemu-c79db8c239fb4272de3cd0741c0ecfd549d5588a.tar.gz qemu-c79db8c239fb4272de3cd0741c0ecfd549d5588a.tar.bz2 | |
target/mips: Convert MSA 3R instruction format to decodetree (part 3/4)
Convert BINSL (Vector Bit Insert Left) and BINSR (Vector Bit
Insert Right) opcodes to decodetree.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211028210843.2120802-23-f4bug@amsat.org>
Diffstat (limited to 'stubs/cpu-synchronize-state.c')
0 files changed, 0 insertions, 0 deletions