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| author | Babu Moger <babu.moger@amd.com> | 2025-05-08 14:58:02 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-05-28 19:35:55 +0200 |
| commit | dfd5b456108a75588ab094358ba5754787146d3d (patch) | |
| tree | 5b2de8df029464b436272915169bfabc79ced745 /python | |
| parent | fc014d9ba5b26b27401e0e88a4e1ef827c68fe64 (diff) | |
| download | qemu-dfd5b456108a75588ab094358ba5754787146d3d.zip qemu-dfd5b456108a75588ab094358ba5754787146d3d.tar.gz qemu-dfd5b456108a75588ab094358ba5754787146d3d.tar.bz2 | |
target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX
Add CPUID bit indicates that a WRMSR to MSR_FS_BASE, MSR_GS_BASE, or
MSR_KERNEL_GS_BASE is non-serializing amd PREFETCHI that the indicates
support for IC prefetch.
CPUID_Fn80000021_EAX
Bit Feature description
20 Indicates support for IC prefetch.
1 FsGsKernelGsBaseNonSerializing.
WRMSR to FS_BASE, GS_BASE and KernelGSbase are non-serializing.
Link: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/57238.zip
Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/a5f6283a59579b09ac345b3f21ecb3b3b2d92451.1746734284.git.babu.moger@amd.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions