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| author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2024-08-28 10:36:51 +0200 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-02 15:11:51 +1000 |
| commit | 5b8764193be027b2298133a819358f636ff53962 (patch) | |
| tree | 51b67544c25446961b7c3d1c360b023bac68d5d4 /python | |
| parent | 55c136599f512a86e3fec9f77b6b5a30a6b34cca (diff) | |
| download | qemu-5b8764193be027b2298133a819358f636ff53962.zip qemu-5b8764193be027b2298133a819358f636ff53962.tar.gz qemu-5b8764193be027b2298133a819358f636ff53962.tar.bz2 | |
target: riscv: Add Svvptc extension support
The Svvptc extension describes a uarch that does not cache invalid TLB
entries: that's the case for qemu so there is nothing particular to
implement other than the introduction of this extension.
Since qemu already exposes Svvptc behaviour, let's enable it by default
since it allows to drastically reduce the number of sfence.vma emitted
by S-mode.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240828083651.203861-1-alexghiti@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions