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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-08-22 14:23:49 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-09-14 11:19:40 +0100 |
| commit | 76e25d41d44c49eb0fe399064a719702a3023102 (patch) | |
| tree | 8057b5d34ad0ab90188943fd45b4cc78e65b0463 /io/trace.h | |
| parent | bb7d902154f7f17c9127631c42a21fbbc805cb40 (diff) | |
| download | qemu-76e25d41d44c49eb0fe399064a719702a3023102.zip qemu-76e25d41d44c49eb0fe399064a719702a3023102.tar.gz qemu-76e25d41d44c49eb0fe399064a719702a3023102.tar.bz2 | |
target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows
When the cycle counter overflows, we are intended to set bit 31 in PMOVSR
to indicate this. However a missing ULL suffix means that we end up
setting all of bits 63-31. Fix the bug.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220822132358.3524971-2-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'io/trace.h')
0 files changed, 0 insertions, 0 deletions